Changes between Version 2 and Version 3 of Component/Vci Xcache

Timestamp:

May 17, 2007, 11:32:19 AM (17 years ago)

Author:

Nicolas Pouillon

Comment:

--

Component/Vci Xcache

@@ -43 +43 @@
  * The processor is stalled in case of cached read MISS, in case of uncached read, or in case of write, if the write buffer is full.
 
+= Component definition =
+
+Available in source:trunk/soclib/desc/soclib/vci_xcache.sd
+
+== Usage ==
+
+!VciXcache has VCI ones and an optional write_fifo_depth defaulting to 8, it may be used like others, see [wiki:SoclibCc/VciParameters SoclibCc/VciParameters], with an additional parameter prepended.
+{{{
+Use( 'vci_xcache', **vci_parameters )
+Use( 'vci_xcache', write_fifo_depth = 16, **vci_parameters )
+}}}
+
 = !VciXcache CABA  Implementation =