Changes between Version 7 and Version 8 of Component/Vci Xcache

Timestamp:

Feb 5, 2008, 2:40:21 PM (16 years ago)

Author:

Nicolas Pouillon

Comment:

Moved files

Component/Vci Xcache

@@ -5 +5 @@
 This VCI initiator is a generic cache controller, fully compliant with the 
 VCI advanced protocol. Thanks to a normalized interface 
-(source:trunk/soclib/systemc/include/caba/interface/xcache_signals.h),
+(source:trunk/soclib/communication/xcache/caba/source/include/xcache_signals.h),
 this blocking cache controller can be used by several RISC processors
 (such as Mips R3000, Sparc V8, or !OpenRisc 1000). It contains two separated
 instruction and data caches, sharing the same VCI interface.
-(source:trunk/soclib/systemc/include/caba/interface/vci_signals.h)
+(source:trunk/soclib/communication/vci/caba/source/include/vci_signals.h)
 
  * The VCI ADDRESS and DATA fields must have 32 bits, and the VCI ERROR field must have 1 bit.
@@ -39 +39 @@
 = Component definition =
 
-Available in source:trunk/soclib/desc/soclib/vci_xcache.sd
+Available in source:trunk/soclib/module/internal_component/vci_xcache/caba/metadata/vci_xcache.sd
 
 == Usage ==
@@ -52 +52 @@
 
 The caba implementation is in 
- * source:trunk/soclib/systemc/include/caba/initiator/vci_xcache.h
- * source:trunk/soclib/systemc/src/caba/initiator/vci_xcache.cc
+ * source:trunk/soclib/module/internal_component/vci_xcache/caba/source/include/vci_xcache.h
+ * source:trunk/soclib/module/internal_component/vci_xcache/caba/source/src/vci_xcache.cpp
 
 == Template parameters ==