Changes between Version 8 and Version 9 of Component/Vci Xcache

Timestamp:

Feb 8, 2008, 8:01:53 PM (16 years ago)

Author:

alain

Comment:

--

Component/Vci Xcache

@@ -1 +1 @@
 [wiki:Component SocLib Components General Index] 
 
-= !VciXcache Functional Description =
+= !VciXcache =
+
+== Functional Description ==
 
 This VCI initiator is a generic cache controller, fully compliant with the 
@@ -18 +20 @@
 until the previous transaction is completed. Therefore, it does not use the VCI PKTID and TRDID fields.
 
-== Instruction Cache ==
+=== Instruction Cache ===
  * The Instruction cache is direct mapping and read-only.
  * It uses the [wiki:Component/MappingTable Mapping Table] to support uncached segments.
@@ -24 +26 @@
  * The only VCI transaction generated by the Instruction cache is a read burst corresponding to a missing cache line.
 
-== Data Cache ==
+=== Data Cache ===
 
  * The Data cache is direct mapping, and the write policy is WRITE-THROUGH (the data is immediately written in memory, and the cache is updated only in case of HIT).
@@ -37 +39 @@
  * The processor is stalled in case of cached read MISS, in case of uncached read, or in case of write, if the write buffer is full.
 
-= Component definition =
+== Component definition ==
 
 Available in source:trunk/soclib/module/internal_component/vci_xcache/caba/metadata/vci_xcache.sd
@@ -49 +51 @@
 }}}
 
-= !VciXcache CABA  Implementation =
+== CABA  Implementation ==
 
 The caba implementation is in 
  * source:trunk/soclib/module/internal_component/vci_xcache/caba/source/include/vci_xcache.h
  * source:trunk/soclib/module/internal_component/vci_xcache/caba/source/src/vci_xcache.cpp
+
+== TLM-T Implementation ==
 
 == Template parameters ==