Changes between Version 13 and Version 14 of Component/Vci Xcache Wrapper


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Timestamp:
Aug 25, 2008, 7:15:04 PM (16 years ago)
Author:
alain
Comment:

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  • Component/Vci Xcache Wrapper

    v13 v14  
    6565 * Both first & second level page table contains 1024 entries.
    6666 * Two page sizes are supported : 4 Kbytes, or 4 Mbytes.
    67  * Two separated TLBs are used for instruction and data addresses.
     67 * Separated TLBs are used for instruction and data addresses.
     68 * Separated TLBS are used for 4 Kbytes and 4 Mbytes pages (accessed in parallel).
    6869 * The TLB misses are handled by hardware (hardwired table-walk).
    6970 * An execution context is defined by the value stored in the PTPR (Page Table Pointer Register).
    … …  
    138139
    139140=== CABA constructor parameters ===
     141
    140142'''Xcache'''
    141143{{{
    … …  
    145147        const soclib::common::MappingTable &mt,
    146148        const soclib::common::IntTab &index,
    147         size_t icache_sets,        // number of  associative sets (instruction cache)
    148         size_t icache_words,    // number of words per line (instruction cache)
    149         size_t icache_ways,      // number of ways per associative set (instruction cache)
    150         size_t dcache_sets,       // number of  associative sets (data cache)
    151         size_t dcache_words,    // number of words per line (data cache)
    152         size_t dcache_ways );    // number of ways per associative set (data cache)
     149        size_t icache_sets,  // number of  associative sets (instruction cache)
     150        size_t icache_words,  // number of words per line (instruction cache)
     151        size_t icache_ways,  // number of ways per associative set (instruction cache)
     152        size_t dcache_sets,  // number of  associative sets (data cache)
     153        size_t dcache_words,  // number of words per line (data cache)
     154        size_t dcache_ways );  // number of ways per associative set (data cache)
    153155}}}
    154156'''Vcache'''
    … …  
    159161        const soclib::common::MappingTable &mt,
    160162        const soclib::common::IntTab &index,
    161         size_t itlb_m_ways,
    162         size_t itlb_m_sets,
    163         size_t itlb_k_ways,
    164         size_t itlb_k_sets,
    165         size_t dtlb_m_ways,
    166         size_t dtlb_m_sets,
    167         size_t dtlb_k_ways,
    168         size_t dtlb_k_sets,
    169         size_t page_m_nbits,   
    170         size_t page_k_nbits,
    171         size_t icache_lines,
    172         size_t icache_words,
    173         size_t icache_sets,
    174         size_t dcache_lines,
    175         size_t dcache_words
    176         size_t dcache_sets );
     163        size_t itlb_m_ways,  // number of ways per associative sets (instruction TLB/M)
     164        size_t itlb_m_sets,  // number of associative sets (instruction TLB/M)
     165        size_t itlb_k_ways,  // number of ways per associative sets (instruction TLB/K)
     166        size_t itlb_k_sets,   // number of associative sets (instruction TLB/K)
     167        size_t dtlb_m_ways,  // number of ways per associative sets (data TLB/M)
     168        size_t dtlb_m_sets,  // number of associative sets (data TLB/M)
     169        size_t dtlb_k_ways,  // number of ways per associative sets (data TLB/K)
     170        size_t dtlb_k_sets,  // number of associative sets (data TLB/K)
     171        size_t icache_sets,  // number of  associative sets (instruction cache)
     172        size_t icache_words,  // number of words per line (instruction cache)
     173        size_t icache_ways,  // number of ways per associative set (instruction cache)
     174        size_t dcache_sets,  // number of  associative sets (data cache)
     175        size_t dcache_words,  // number of words per line (data cache)
     176        size_t dcache_ways );  // number of ways per associative set (data cache)
    177177}}}
    178178'''CC_Xcache'''
    … …  
    184184        const soclib::common::IntTab &initiator_index,
    185185        const soclib::common::IntTab &target_index,
    186         size_t icache_lines,
    187         size_t icache_words,
    188         size_t icache_sets,
    189         size_t dcache_lines,
    190         size_t dcache_words 
    191         size_t dcache_sets );
     186        size_t icache_sets,  // number of  associative sets (instruction cache)
     187        size_t icache_words,  // number of words per line (instruction cache)
     188        size_t icache_ways,  // number of ways per associative set (instruction cache)
     189        size_t dcache_sets,  // number of  associative sets (data cache)
     190        size_t dcache_words,  // number of words per line (data cache)
     191        size_t dcache_ways );  // number of ways per associative set (data cache)
    192192}}}
    193193'''CC_Vcache'''
    … …  
    199199        const soclib::common::IntTab &initiator_index,
    200200        const soclib::common::IntTab &target_index,
    201         size_t itlb_m_ways,
    202         size_t itlb_m_sets,
    203         size_t itlb_k_ways,
    204         size_t itlb_k_sets,
    205         size_t dtlb_m_ways,
    206         size_t dtlb_m_sets,
    207         size_t dtlb_k_ways,
    208         size_t dtlb_k_sets,
    209         size_t page_m_nbits,   
    210         size_t page_k_nbits,
    211         size_t icache_lines,
    212         size_t icache_words,
    213         size_t icache_sets,
    214         size_t dcache_lines,
    215         size_t dcache_words
    216         size_t dcache_sets );
     201        size_t itlb_m_ways,  // number of ways per associative sets (instruction TLB/M)
     202        size_t itlb_m_sets,  // number of associative sets (instruction TLB/M)
     203        size_t itlb_k_ways,  // number of ways per associative sets (instruction TLB/K)
     204        size_t itlb_k_sets,   // number of associative sets (instruction TLB/K)
     205        size_t dtlb_m_ways,  // number of ways per associative sets (data TLB/M)
     206        size_t dtlb_m_sets,  // number of associative sets (data TLB/M)
     207        size_t dtlb_k_ways,  // number of ways per associative sets (data TLB/K)
     208        size_t dtlb_k_sets,  // number of associative sets (data TLB/K)
     209        size_t icache_sets,  // number of  associative sets (instruction cache)
     210        size_t icache_words,  // number of words per line (instruction cache)
     211        size_t icache_ways,  // number of ways per associative set (instruction cache)
     212        size_t dcache_sets,  // number of  associative sets (data cache)
     213        size_t dcache_words,  // number of words per line (data cache)
     214        size_t dcache_ways );  // number of ways per associative set (data cache)
    217215}}}
    218216