Changes between Version 5 and Version 6 of Component/Virtual Dspin Router
- Timestamp:
- Jul 9, 2009, 10:18:32 AM (16 years ago)
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Component/Virtual Dspin Router
v5 v6 6 6 7 7 This is the elementary node of a Virtual Dspin Array. 8 9 The Virtual Dspin Router is a component which connects up to five input (one local, four for the adjacent Virtual Dspin Router) to five output (idem) for each virtual channel. 10 11 Both channels share the same bus for routing. Thus, each input has a time multiplexing register, to decide 8 12 9 13 == 2) Component definition & usage == … … 20 24 === CABA Internal registers === 21 25 22 || sc_signal<int> || r_output_index || for each channel & each output, input index (INFSM) 23 || sc_signal<bool> || r_input_alloc || for each channel & each input, alloc 26 || sc_signal<int> || r_output_index || for each channel & each output, input index (INFSM) 24 27 || sc_signal<bool> || r_tdm || for each input, Time Multiplexing 25 28 || sc_signal<sc_uint<data_size> > || r_buf || for each channel & each input, fifo extension