| 5 | SystemCASS is a SystemC simulation engine, optimized to simulate hardware architectures modeled with the CABA (cycle accurate, bit accurate) components of SoCLib. |
| 6 | This simulator is 15 times faster than OSCI's simulator (SystemC 2.1.v1). |
| 7 | |
| 8 | Why is SystemCASS faster ? |
| 9 | |
| 10 | SystemCass take advantages of the [wiki:WritingRules/Caba CABA modeling rules] of the SoCLib |
| 11 | project, to use static scheduling technics, and behave as a cycle-based simulator. |
| 12 | During simulator elaboration, SystemCASS builds a signal dependency graph according to the architecture to simulate. The scheduler relies on this graph to statically compute the scheduling. |