wiki:WikiStart

Version 30 (modified by wahid, 16 years ago) (diff)

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Welcome to SoCLib project home page


Goals

  • Build an open platform for modeling and simulation of multi-processors system on chip, that can be used by both universities and industrial companies.
  • The core of the platform is a library of simulation models for virtual components (IP cores), with a guaranteed path to silicon.
  • Create the largest possible cooperation project at European level, in order to share the development costs.

Technical features

The main concern is true interoperability between the SoCLib IP cores :

  • All simulation models written in SystemC
  • Two well defined abstraction levels have been defined :
    • CABA (Cycle Accurate / Bit Accurate)
    • TLM-T (Transaction Level Modeling with Time)
  • All SoCLib components respect the VCI communication protocol.

Principles

Openness

All simulation models are distributed as open source and available to all academic institutions and industrial company

Path to silicon

A synthesizable RTL model must exist for each SoCLib component, in order to guarantee a path to silicon for any system designed with the SoCLib library.

Business model

The RTL synthesizable models are NOT part of the SoCLib library, in order to preserve the IP providers business.

European scale

The SoCLib project was launched and is supported by the French CNRS (Centre National de la Recherche Scientifique), but is now part of the EUROSOC network.

Partners

6 industrial companies and 11 academic laboratories are contributing to the French SoCLib project :


Get your own copy

First, you have to create an account, so, if you haven’t already done it, please register!

E-mail:  

Please note that this e-mail will be your login ID!

You may also want to sign-up for the developers mailing list dev@…, to do so please visit this link.

If you need write access or for any other problem please contact me.


Then you’ll have to setup your environment and install the needed tools.

You’ll find all the necessary informations on the SoCLib development trac page.