[[PageOutline]] = What is SoCLib = * SoCLib is an open platform for virtual prototyping of multi-processors system on chip (MP-SoC). * The core of the platform is a library of SystemC simulation models for virtual components (IP cores) * The project started as an ANR-founded project. It is now maintained at [http://www.lip6.fr/ Lip6] You may want to have a look at FeaturesDescription, or [GetAccount get an account] If you want to try SoCLib without going through the installation process, the [https://www.soclib.fr/appliance/ SoCLib Virtual machine appliance] may help you ! ([GetAccount login] required) = SoCLib Components = * [wiki:Component SoCLib Components General Index] : documentation about the available hardware components (IP cores) = Installation = * [wiki:InstallationNotes Installation Notes] : how to install the SoCLib platform on your computer = Usage = * SoclibCc is the current build system for SoCLib platforms = Development = * [wiki:AddComponent Adding new components to the library] : the rules to follow to add a new IP core to the library. = SoCLib guest OS support = * [wiki:Tools/Muteka DNA/OS] : DNA/OS is a micro-kernel for MPSoCs. It supersedes MutekA, and still provides the POSIX thread API. * [http://www.mutekh.org/ MutekH] : Exo-kernel based OS for classical and heterogeneous MPSoCs with POSIX threads support * [http://www.netbsd.org/ NetBSD] : Highly portable Unix-like Open Source operating system * [http://ecos.sourceware.org/ eCos] : An open source, royalty-free, real-time operating system intended for embedded applications. * [http://www.rtems.com/ RTEMS] : Real-Time Operating System for Multiprocessor Systems = Middleware = * [wiki:Tools/Mwmr MWMR] : Hardware / Software communication middleware = SoCLib Tools = * [wiki:Tools/Dsx DSX] : Design Space Exploration tool * [wiki:Tools/SystemCass SystemCASS] : Fast SystemC simulation kernel * [wiki:Tools/SocView SoCView] : Interactive simulation environment for debug and instrumentation * [wiki:Tools/GdbServer GdbServer] : A GDB server for multi-processor architectures * [wiki:Tools/MemoryChecker MemoryChecker] : A memory access error checker similar to valgrind. * [wiki:Tools/VCI_Validation VCI Validation] : A library for the validation of the VCI protocol (CABA and TLM-T versions) * [wiki:Tools/GAUT GAUT] : A high-level synthesis tool allowing to generate automatically systemC CABA and TLM-T files. = SoCLib Resources = == Mailing list == The [mailto:dev@soclib.fr] Mailing list is public and targets general discussion about SoCLib component development. To join the list, either * send an email to [mailto:dev-subscribe@soclib.fr]; * see [http://www.soclib.fr/wws/info/dev]. == Writing and design guides == * [wiki:WritingRules/General General SoCLib Rules] : general rules regarding the SoCLib components. * [wiki:WritingRules/Caba CABA Writing Rules] : rules to write SystemC CABA simulation models. * [wiki:WritingRules/Tlmt TLM-DT Writing Rules] : rules to write SystemC TLM-DT simulation models. * [wiki:WritingRules/RISC Processor Modeling] : a general method to write generic processor models. * [wiki:VciAndEndianness Endianness considerations] : Endianness rules in SoCLib * [wiki:WritingRules/Transactors CABA/TLM-DT Transactors] : general principles == Miscelaneous == * [wiki:WritingRules/TLMT Critères Pour Plate-Forme TLM-T] : criteria defined for writing TLM-T simulation models. * [wiki:SoclibCc/DesignGuide SoclibCc/DesignGuide] is an attempt to justify the choices made in soclib-cc * [wiki:Models Models of documents] to be used by the project partners * [wiki:FrequentlyAskedQuestions Frequently asked questions]: When things goes wrong * [wiki:Benchmarks Benchmark]: A few shared benchmarks = Tutorials = * [https://www-asim.lip6.fr/trac/dsx/wiki/MjpegCourse DSX tutorial] * [wiki:Motion-JPEG Motion-JPEG and OS tutorial] = Posters and publications = * [attachment:PosterICT-Soclib-V5-HD.pdf]