Changes between Version 12 and Version 13 of Writing Rules/Caba
- Timestamp:
- Mar 27, 2007, 10:29:59 PM (18 years ago)
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Writing Rules/Caba
v12 v13 9 9 10 10 Those modeling rules are based on the "Synchronous Communicating Finite State Machines" theory. The idea is to force the "event driven" SystemC simulation engine to run as a cycle based simulator. 11 12 [[Image(fsm.png,align=right,nolink)]] 11 13 12 14 A given hardware architecture is obtained by direct instantiation of hardware modules, connected by signals. A given architecture can contain several instances of the same module. Each module is described as one (or several) synchronous FSM(s). … … 16 18 * The Moore generation function computes the values of those output port signals that depend only on the internal registers. 17 19 * The Mealy generation functions computes values of those output port signals that depend both on the internal registers AND the values of the input port signals. 18 19 [[Image(fsm.png)]]20 20 21 21 In this figure we represented a single FSM, but a SoCLib component contains generally several small FSMs running in parallel inside a single module. This internal parallelism should be properly described.