Changes between Version 19 and Version 20 of Writing Rules/Caba


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Timestamp:
Sep 7, 2007, 5:28:27 PM (17 years ago)
Author:
alain
Comment:

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  • Writing Rules/Caba

    v19 v20  
    3939will communicate through a "flat", shared address space, and all system interconnect will respect the VCI advanced standard. Therefore, most SoCLib components have  VCI interfaces :
    4040
    41 [[Image(WritingRules:mandatory.png, nolink)]]
    42 
    43 All SoCLib hardware components having a VCI interface is called a ''VCI component'', and must include
     41Any SoCLib hardware components having a VCI interface is called a ''VCI component'', and must include
    4442at least one of the the two following files, defining the VCI advanced ports :
    4543 * [source:trunk/soclib/systemc/include/caba/interface/vci_target.h caba/interface/vci_target.h]
     
    6462}}}
    6563
    66 [[Image(WritingRules:mandatory.png, nolink)]]
    67 
    6864The SystemC top cell defining the system architecture must include the following file, defining the advanced VCI signals :
    6965 * [source:trunk/soclib/systemc/include/caba/interface/vci_signals.h caba/interface/vci_signals.h].
    7066
    71 [[Image(WritingRules:guideline.png, nolink)]]
    72 
    7367A SoCLib hardware component that has no VCI interface should use a dedicated VCI  wrapper in order to be connected to the VCI interconnect.
    7468
    7569== B3) Address space segmentation ==
    7670
    77 [[Image(WritingRules:guideline.png, nolink)]]
    7871In a shared memory architecture, the address space segmentation (or memory map) is a global characteristic of the system.
    7972This memory map must be defined by the system designer, and is used by both software, and hardware components.
     
    8578   command packet. Therefore, the base address and size of the segment allocated to a given
    8679   VCI target must be ''known'' by this target.
    87  * A cache controller supporting uncached segments must contain a ''cacheability table''
     80 * A cache controller supporting uncached segments can contain a ''cacheability table''
    8881   addressed by the VCI address MSB bits.
    89 
    90 [[Image(WritingRules:guideline.png, nolink)]]
    9182
    9283In order to simplify the memory map definition, and the hardware component configuration, a
     
    109100== B4) Component definition ==
    110101
    111 [[Image(WritingRules:guideline.png, nolink)]]
    112 
    113102The component ''XXX.h'' file contains the following informations
    114103
     
    143132'''Structural parameters definition'''
    144133
    145 All structural parameters must be be defined as member variables. The values are generally defined by a constructor argument.
     134All structural parameters should be be defined as member variables. The values are generally defined by a constructor argument.
    146135Instance name is stored in [source:trunk/soclib/systemc/include/common/base_module.h soclib::common::BaseModule], inherited by
    147136[source:trunk/soclib/systemc/include/caba/util/base_module.h soclib::caba::BaseModule].