Changes between Version 5 and Version 6 of Writing Rules/Caba


Ignore:
Timestamp:
Mar 27, 2007, 7:51:09 PM (17 years ago)
Author:
alain
Comment:

--

Legend:

Unmodified
Added
Removed
Modified
  • Writing Rules/Caba

    v5 v6  
    11= Introduction =
    22
    3 This manual describes the modeling rules for writing "cycle-accurate / bit-accurate" SystemC simulation models. Those models can be used with the "standard" OSCI simulation engine (SystemC 2.x), but can be used also with others simulation engines, such as [SystemCass SystemCASS], which is optimized for models complying with those rules.
     3This manual describes the modeling rules for writing "cycle-accurate / bit-accurate" SystemC simulation models for SoCLib. Models complying with those rules can be used with the "standard" OSCI simulation engine (SystemC 2.x), but can be used also with others simulation engines, such as [SystemCass SystemCASS], which is optimized for such models.
    44
    55Those modeling rules are based on the "Synchronous Communicating Finite State Machines" theory. The idea is to force the "event driven" SystemC simulation engine to run as a cycle based simulator.
     
    1616In this figure we represented a single FSM, but a SoCLib component contains generally several small FSMs running in parallel inside a single module. This internal parallelism should be properly described.
    1717
    18 = How to write simulation models =
    19 
    20 == Component's module ==
     18= Components =
    2119
    2220A SoCLib CABA component `XXX` is generally described as a class derived from the
     
    2725 * `XXX.cc` contains the code of the methods associated to this component.
    2826
    29 == Namespaces ==
     27= Namespaces =
    3028
    3129SystemC is built upon C++. We can benefit from C++ constructs. Namespaces allows us to create unambiguous names
     
    3634 * `soclib::tlmt`
    3735
    38 == Component indexation ==
    39 
    40 In a VCI-based architecture, all initiators must be indexed. Targets are identified by their assigned address space. However, for simplification purposes, we'll also give an index to the targets. Index space for targets is different from index space for initiators.
    41  * The target index is the connection port number on interconnects, this index will be decoded from target address in VCI cmd packet.
     36= Component indexation =
     37
     38In a VCI-based architecture, all initiators must be indexed. Targets are identified by their assigned address space segment. However, for simplification purposes, we'll also give an index to the targets. Index space for targets is different from index space for initiators.
     39 * The target index is used by interconnects, that decode the VCI address MSB bits to get the target index.
    4240 * The initiator index is used by the interconnect components to route the response packets.
    4341
     
    5048[source:trunk/soclib/systemc/include/common/int_tab.h common/int_tab.h] defines an utility class storing list of indexes. All indexes are `IntTab`s.
    5149
    52 == VCI Interface ==
     50= VCI Interface =
    5351
    5452In order to enforce interoperability between components, all SoCLib hardware components should respect the advanced VCI standard.
     
    7977
    8078
    81 == Address space segmentation ==
    82 
    83 In a shared memory architecture, the address space segmentation (or memory map) is a global characteristic of the system. This memory map must be defined by the system designer, and is used by both software, and hardware components.
     79= Address space segmentation =
     80
     81In a shared memory architecture, the address space segmentation (or memory map) is a global characteristic of the system.
     82This memory map must be defined by the system designer, and is used by both software, and hardware components.
    8483
    8584Most hardware components use this memory map:
    86  * VCI interconnect components contain a « routing table » used to decode the addresses and
    87    route VCI commands to the proper targets. This routing table is implemented as a ROM.
     85 * VCI interconnect components contain a ''routing table'' used to decode the addresses and
     86   route VCI commands to the proper targets.
    8887 * VCI target components must be able to check for segmentation violation when receiving a
    8988   command packet. Therefore, the base address and size of the segment allocated to a given
     
    109108Any hardware component using the memory map should have a constant reference to the mapping table as constructor argument.
    110109
    111 == Constructor arguments ==
    112 
    113 Any hardware component must have an instance name, and most SoCLib component must have
    114 a VCI index. Moreover, generic simulation models can have structural parameters defined as
    115 arguments in the constructor. A typical VCI component will have the following constructor arguments:
    116 
    117 {{{
    118 VciExampleModule(
    119     sc_module_name                     insname,
    120     const soclib::common::IntTab       &index,
    121     const soclib::common::MappingTable &mt);
    122 }}}
    123 
    124 In this example, the first argument is the instance name, the second argument is the VCI target index, and the third argument is the mapping table.
    125 
    126 == Naming conventions ==
     110= Naming conventions =
    127111
    128112The following conventions are not mandatory, but can help to read the code.
     
    131115 * All member variables should be prefixed with `m_`
    132116
    133 == Component ressources ==
     117= Component ressources =
    134118
    135119The component ''XXX.h'' file contains the following informations
    136120
    137 === Interface definition ===
     121== Interface definition ==
    138122
    139123A typical VCI target component will contain the following ports:
     
    144128}}}
    145129
    146 === Internal registers ===
     130== Internal registers ==
    147131
    148132All internal registers must be defined with the type ''sc_signal''
     
    166150''`typename vci_param::trdid_t` and others are generically-defined VCI field types''
    167151
    168 === Structural parameters ===
     152== Structural parameters ==
    169153
    170154All structural parameters must be be defined as member variables. The values are generally defined by a constructor argument.
     
    178162}}}
    179163
    180 == Constructor & descructor ==
    181 
    182 The first constructor argument must be the instance name. Other arguments can be identifiers
    183 (such as a target VCI index or initiator VCI index). The constructor must configure some hardware
    184 ressources, such as the address decoding ROM that exists in any VCI interconnect. An argument frequently
     164= Constructor & destructor =
     165
     166Any hardware component must have an instance name, and most SoCLib component must have
     167a VCI index. Moreover, generic simulation models can have structural parameters defined as
     168arguments in the constructor, and used by the constructor to configure the hardware ressources.
     169A constructor  argument frequently
    185170used is a reference on the [source:trunk/soclib/systemc/include/common/mapping_table.h soclib::common::MappingTable],
    186171that defines the segmentation of the system address space.
     172A typical VCI component will have the following constructor arguments:
     173
     174{{{
     175VciExampleModule(
     176    sc_module_name                     insname,
     177    const soclib::common::IntTab       &index,
     178    const soclib::common::MappingTable &mt);
     179}}}
     180
     181In this example, the first argument is the instance name, the second argument is the VCI target index, and the third argument is the mapping table.
    187182
    188183Moreover, the constructor must define the sensitivity list of the Transition(), genMoore() and genMealy()
     
    194189Be careful: the constructor should NOT initialize the registers.
    195190The register initialization must be an hardware mechanism explicitly described in the Transition function on reset condition.
     191
     192= component behaviour =
     193
     194The component is described by simple sc_methods as member functions.
    196195
    197196== transition() method ==