Changes between Version 1 and Version 2 of Writing Rules/General

Timestamp:

Apr 26, 2007, 10:29:54 PM (18 years ago)

Author:

alain

Comment:

--

Writing Rules/General

@@ -5 +5 @@
 [[PageOutline]]
 
-= A) Introduction =
-
-= B) Naming convention =
+= A) Naming conventions =
 
 '''namespaces'''
@@ -25 +23 @@
  * All component member variable names should be prefixed with `m_`
 
-= C) Component indexation =
+= B) Component indexation =
 
 In a VCI-based architecture, all initiators and targets must be indexed. Initiators and targets have different address spaces.
@@ -33 +31 @@
 Indexes can be :
  * a simple scalar index, in  case of a ''flat'' interconnect.
- * a composite index, in case of a ''clusterised'' architectures, using a two level hierarchical interconnect. Each component is identified by two scalars: cluster_index, local_index. 
+ * a composite index, in case of a ''clusterised'' architecture, using a two level hierarchical interconnect. Each component is identified by two scalars: cluster_index, local_index. 
 
 The `common/int_tab.h`file defines an utility class storing a list of indexes : All indexes must be declared as IntTabs.
+
+= C) Endianness =
+
+All SoCLib targets components respect the little-endianness convention.
+In case of write, the bytes transfers are fully controlled by the VCI BE bits :
+ * If the VCI word is larger than one byte, the LSB bits of the VCI ADDRESS are ignored, and the VCI ADDRESS is only used to address the selected VCI word.
+ *  the selected bytes are specified the VCI BE field, and the BE0 bit is always associated to the Byte 0 of the VCI WDATA field.
+ * The BE1 bit is associated