Changes between Initial Version and Version 1 of Writing Rules/Transactors


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Timestamp:
Feb 24, 2010, 4:59:01 PM (14 years ago)
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alinevieiramello@…
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  • Writing Rules/Transactors

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     1{{
     2#!html
     3<h1>CABA/TLM-DT Transactors for the SoCLib virtual prototyping platform</h1>
     4}}}
     5
     6Authors : Alain Greiner, Aline Vieira de Mello
     7
     8This document is still under development.
     9
     10[[PageOutline]]
     11
     12= A) OBjetives =
     13
     14The main goal of the CABA/TLM-DT transactors is to integrate a small number of CABA (Cycle Accurate Bit Accurate) simulation models in a TLM-DT simulation environment. More precisely, we make the assumption that the shared memory interconnect is a TLM-DT model. This mixed mode simulation, where CABA & TLM-DT simulation models are cooperating in the same simulation environment can be useful  to validate a CABA model (versus a pre-existing TLM-DT model), or simply  to build an heterogeneous top-cell if, or the TLM-DT models, either the CABA models are not available for some hardware components.