Changes between Version 1 and Version 2 of Writing Rules/Transactors


Ignore:
Timestamp:
Feb 24, 2010, 4:59:27 PM (14 years ago)
Author:
alinevieiramello@…
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • Writing Rules/Transactors

    v1 v2  
    11{{
    2 #!html
    3 <h1>CABA/TLM-DT Transactors for the SoCLib virtual prototyping platform</h1>
     2#!html<h1>CABA/TLM-DT Transactors for the SoCLib virtual prototyping platform</h1>
    43}}}
    54
    … …  
    109[[PageOutline]]
    1110
    12 = A) OBjetives =
     11= A) Objetives =
    1312
    1413The main goal of the CABA/TLM-DT transactors is to integrate a small number of CABA (Cycle Accurate Bit Accurate) simulation models in a TLM-DT simulation environment. More precisely, we make the assumption that the shared memory interconnect is a TLM-DT model. This mixed mode simulation, where CABA & TLM-DT simulation models are cooperating in the same simulation environment can be useful  to validate a CABA model (versus a pre-existing TLM-DT model), or simply  to build an heterogeneous top-cell if, or the TLM-DT models, either the CABA models are not available for some hardware components.