CABA/TLM-DT Transactors for the SoCLib virtual prototyping platform

Authors : Alain Greiner, Aline Vieira de Mello

This document is still under development.

A) Objetives

The main goal of the CABA/TLM-DT transactors is to integrate a small number of CABA (Cycle Accurate Bit Accurate) simulation models in a TLM-DT simulation environment. More precisely, we make the assumption that the shared memory interconnect is a TLM-DT model. This mixed mode simulation, where CABA & TLM-DT simulation models are cooperating in the same simulation environment can be useful to validate a CABA model (versus a pre-existing TLM-DT model), or simply to build an heterogeneous top-cell if, or the TLM-DT models, either the CABA models are not available for some hardware components.

B) General Principles

A CABA model for a VCI target is connected to a VciTargetTransactor component. Symetrically, a CABA model for a VCI initiator is connected to a VciInitiatorTransactor component. Both transactors have a CABA interface on one side, and a TLM-DT interface on the other side.

Each transactor behaves as a standard VCI initiator or VCI target TLM-DT component for the TLM-DT simulation environment. Each transactor contains a behavior() sc_thread modeling the PDES process (parallel Discrete Event Simulation) associated to the corresponding hardware component. According to the distributed representation of time in PDES, each transactor contains a local time variable, that is the time associated to the initiator or target respectively.

The VCI initiator is supposed to be able to initiate several simultaneous (parallel) VCI transactions. When there is several simultaneous transactions, the various transactions are identified by the TRDID field. The VCI PKTID field is not used Symetrically, the VCI target is supposed to be able to accept several simultaneous VCI commands, identified by both the VCI SRCID field (a given target can receive commands from all initiators), and the VCI TRDID field (each initiator can send several simultaneous transactions).

The modeling approach for the transactors respects the PDES distributed time representation : The clock signal CK of the CABA component is directly driven by the associated transactor component, depending on the local time evolution. If there are several CABA components in a given TLM-DT platform, there is no direct coupling between the CABA components (no sc_signal connecting two CABA component controled by two different transactors).

C) Modeling