__group__	ticket	summary	component	version	milestone	type	owner	status	created	_changetime	_description	_reporter
Active Tickets	73	Missing include in tlmdt.h	soclib-cc			defect	Nicolas Pouillon	new	2010-10-07T17:13:09+02:00	2010-10-07T17:13:09+02:00	"I'm facing compile problems on an ubuntu 10.04 machine when compiling the tlmdt topcells.

The particular problem here is this line in ltmdt.h:
const uint64_t MAX_TIME  = std::numeric_limits<uint64_t>::max();
with the following error:
tlmdt.h:18: error: ‘numeric_limits’ is not a member of ‘std’

Quickfix:
Add #include <limits> to ltmdt.h

"	axer@…
Active Tickets	91	lire a partir de composant xicu	IP-Cores			defect	developers	new	2011-10-19T20:06:45+02:00	2011-10-19T20:06:45+02:00	"mon travail consiste à implémenter d'une commande numérique sur l'architecture caba-vgmn-rtems-mips32 avec l'OS rtems. je trouve un problème lorsque je veut accéder au valeur de timer qui est intégré dans le composant xicu. je met cette instruction mais ça marche pas : val (XICU_PTI_VAL); dans le code c de l'application.
merci d'avance"	anonymous
Active Tickets	93	Problem realizing MP-SoC	examples			helpdesk	Alberto	new	2011-12-12T19:00:36+01:00	2011-12-12T19:00:36+01:00	"Hello,
I am trying to realize an MP-SoC that should execute different operation with many cpu. I wonder how I can organize my project if I will have to write more than one ""bin.soft"" and put them in different rams. For example consider that i+d like that the mips1 reads the application from ram1 and mips2 reads another application from ram2...how can i realize that? I´ve followed all the tutorials and I´ve seen many example but I don´t understand how to do this with mapping table, segments, more loader (I suppose), and fixed adress space needed by te myps.

Thanks for your attention."	berto20@…
Active Tickets	90	Mips32: Rare case of wrong EPC when fault is in branch delay slot	iss			defect	developers	new	2011-09-12T23:21:11+02:00	2011-09-12T23:21:11+02:00	"When an exception occurs in a branch delay slot, the Mips processor must set EPC=fault_pc-4 and CAUSE:BD=1. The current test to check if a branch is taken is m_next_pc+4 != m_jump_pc, which fails when branching to branch instruction+8.

Test case:

b    1f
lw   $1, 1($0)  // raise bad alignment in delay slot
1:
nop

Branch is taken but m_next_pc+4 != m_jump_pc is false which results in EPC=fault_pc and CAUSE:BD=0 with current model implementation.
"	becoulet
Active Tickets	62	Systematic Warning with gcc 4.3.2	IP-Cores			enhancement	developers	new	2010-04-23T18:50:30+02:00	2010-04-23T18:50:30+02:00	"Would it be possible to fix elfpp to avoid systematic warning when compiling platforms containing a loader.

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc: In member function 'void elfpp::elfn_access<bits_t, width>::load_addend(const elfpp::object&, elfpp::reloc&, const typename bits_t::elf_rel_t*, size_t, int, uint8_t*) [with bits_t = elfpp::elf32_bits_s, int width = 32]':

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:783:   instantiated from here

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:128: warning: comparison between signed and unsigned integer expressions

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:130: warning: comparison between signed and unsigned integer expressions

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc: In member function 'void elfpp::elfn_access<bits_t, width>::load_addend(const elfpp::object&, elfpp::reloc&, const typename bits_t::elf_rel_t*, size_t, int, uint8_t*) [with bits_t = elfpp::elf64_bits_s, int width = 64]':

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:784:   instantiated from here

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:128: warning: comparison between signed and unsigned integer expressions

SOCLIB_HOME/soclib/lib/elf_file_loader/libelfpp/src/elfpp_access.cc:130: warning: comparison between signed and unsigned integer expressions

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%"	graba
Active Tickets	83	os ecos	examples			helpdesk	developers	new	2011-07-19T17:13:10+02:00	2011-10-20T01:47:15+02:00	"lors de chargement de l'application test twothreads avec l'os ecos dans une architecture mips32, le code est bloqué, je reçoit seulement le texte suivant  sur le console:
Entering twothreads' cyg_user_start() function  
Beginning execution; thread data is 0 
Beginning execution; thread data is 1
"	anonymous