| | 1 | [wiki:Component SocLib Components General Index] |
| | 2 | |
| | 3 | = Processor Functional Description = |
| | 4 | |
| | 5 | This hardware component is a Arm instruction set simulator. |
| | 6 | |
| | 7 | This ISS uses the [wiki:Component/Iss2Api ISS2 API] |
| | 8 | and can be wrapped in a CABA or TLM-T [wiki:Component/VciXcacheWrapper Wrapper]. |
| | 9 | |
| | 10 | It implements most of the v6k instruction-set revision. |
| | 11 | * Thumb is not supported yet. |
| | 12 | * The floating point instructions are not supported |
| | 13 | * Only little-endian variant is supported. |
| | 14 | |
| | 15 | = Component definition & implementation = |
| | 16 | |
| | 17 | * source:trunk/soclib/soclib/iss/arm/metadata/arm.sd |
| | 18 | * source:trunk/soclib/soclib/iss/arm/include/arm.h |
| | 19 | * source:trunk/soclib/soclib/iss/arm/src/arm.cpp |
| | 20 | * source:trunk/soclib/soclib/iss/arm/src/arm_alu.cpp |
| | 21 | * source:trunk/soclib/soclib/iss/arm/src/arm_control.cpp |
| | 22 | * source:trunk/soclib/soclib/iss/arm/src/arm_coproc.cpp |
| | 23 | * source:trunk/soclib/soclib/iss/arm/src/arm_decoding_table.cpp |
| | 24 | * source:trunk/soclib/soclib/iss/arm/src/arm_instructions.cpp |
| | 25 | * source:trunk/soclib/soclib/iss/arm/src/arm_load_store.cpp |
| | 26 | |
| | 27 | == Template parameters == |
| | 28 | |
| | 29 | This component has no template parameters. |
| | 30 | |
| | 31 | == Interrupts == |
| | 32 | |
| | 33 | It has only one interrupt line. |
| | 34 | |
| | 35 | == Ports == |
| | 36 | |
| | 37 | None, it is to the wrapper to provide them. |
