Changes between Version 4 and Version 5 of Component/NIOSII
- Timestamp:
- May 11, 2009, 11:38:34 AM (15 years ago)
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Component/NIOSII
v4 v5 7 7 * NiosII/s. The NiosII/s “standard” core is designed for small size while maintaining performance. 8 8 * NiosII/e. The NiosII/e “economy” core is designed to achieve the smallest possible core size. 9 This hardware component is only an ISS, which should be wrapped with an [wiki:Component/IssWrapper IssWrapper]. 9 This hardware component is only an ISS, which should be wrapped with a CABA or TLM-T [wiki:Component/IssWrapper VciXcacheWrapper] using the [wiki:Component/IssIss2 IssIss2] utility component. 10 10 11 11 12 The simulation model is actually an instruction set simulator, organized as a three-stage pipeline: