| | 1 | [wiki:Component SocLib Components General Index] |
| | 2 | |
| | 3 | = Tc4200 = |
| | 4 | |
| | 5 | == 1) Functional Description == |
| | 6 | |
| | 7 | This VCI target corresponds to a IEEE802.16e LDPC decoder. It embeds an internal hardware Cycle Accurate Bit Accurate model of the [http://www.turboconcept.com TurboConcept]'s IEEE802.16e WiMAX LDPC decoder [http://www.turboconcept.com/prod_tc4200wimax.php tc4200]. |
| | 8 | |
| | 9 | !TurboConcept's TC4200-WiMAX Core is a high speed Low Density Parity Check code (LDPC) decoder optimized for WiMAX (IEEE 802.16e) specifications. A patented decoding architecture allows meeting high throughputs within small devices, and still offering close-to-ideal Bit Error Rate (BER) performances. |
| | 10 | |
| | 11 | |
| | 12 | [[Image(tc4200.png,align=right,nolink) Figure 1 - Tc4200]] |
| | 13 | |
| | 14 | Figure 1 presents the general core structure. The Tc4200 is made of a VCI wrapper and an internal hardware decoder model which communicates using proprietary FIFO-like protocols. |
| | 15 | |
| | 16 | |
| | 17 | |
| | 18 | == 2) Component definition & usage == |
| | 19 | |
| | 20 | * source:trunk/soclib/soclib/module/streaming_component/tc4200/caba/metadata/tc4200.sd |
| | 21 | * source:trunk/soclib/binary/module/streaming_component/tc4200/caba/doc |
| | 22 | |
| | 23 | |
| | 24 | == 3) CABA Implementation == |
| | 25 | |
| | 26 | === CABA sources === |
| | 27 | |
| | 28 | * interface : source:trunk/soclib/soclib/module/streaming_component/tc4200/caba/source/include/tc4200.h |
| | 29 | * implementation : source:trunk/soclib/soclib/module/streaming_component/tc4200/caba/source/src/tc4200.cpp |
| | 30 | * internal component interface : source:trunk/soclib/binary/module/streaming_component/tc4200/caba/include/tc_tc4200.h |
| | 31 | * internal component library : source:trunk/soclib/binary/module/streaming_component/tc4200/caba/lib |
| | 32 | |
| | 33 | |
| | 34 | === CABA Constructor parameters === |
| | 35 | |
| | 36 | * IEEE802.16e LDPC decoder |
| | 37 | {{{ |
| | 38 | Tc4200( |
| | 39 | sc_module_name name, // Instance name |
| | 40 | const soclib::common::IntTab &index, // Target index |
| | 41 | const soclib::common::MappingTable &mt) // Mapping Table |
| | 42 | }}} |
| | 43 | |
| | 44 | |
| | 45 | === CABA Addressable registers === |
| | 46 | * Read only registers |
| | 47 | * {{{TC4200_D_OUT}}} Data output register |
| | 48 | * {{{TC4200_MONITOR}}} Monitoring interface. See Figure 2 |
| | 49 | [[Image(monitor_reg.png,align=center, nolink) Figure 2 - Monitoring register.]] |
| | 50 | |
| | 51 | * Write only registers |
| | 52 | * {{{TC4200_CONFIG}}} Configuration interface. See Figure 3 |
| | 53 | [[Image(config_reg.png, align=center,nolink) Figure 3 - Configuration register.]] |
| | 54 | * {{{TC4200_D_IN_FIRST}}} Register for the First data corresponding to a new frame. See Figure 4. |
| | 55 | [[Image(data_in_first.png, align=center,nolink) Figure 4 - First data of a new frame register.]] |
| | 56 | * {{{TC4200_D_IN}}} Register for any other input frame data. See Figure 5. |
| | 57 | [[Image(data_in.png, align=center,nolink) Figure 5 - Data register. Value for the i-th written data.]] |
| | 58 | . |
| | 59 | |
| | 60 | |
| | 61 | === CABA Ports === |
| | 62 | |
| | 63 | * sc_in<bool> '''p_resetn''' : hardware reset |
| | 64 | * sc_in<bool> '''p_clk''' : clock |
| | 65 | * soclib::common::!VciTarget<vci_param> '''p_vci''' : The VCI port |
| | 66 | |
| | 67 | == 4) TLM-T Implementation == |
| | 68 | |
| | 69 | === TLM-T sources === |
| | 70 | |
| | 71 | |
| | 72 | * interface : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmt/source/include/tc4200.h |
| | 73 | * implementation : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmt/source/src/tc4200.cpp |
| | 74 | * internal component interface : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmt/include/tc_tc4200.h |
| | 75 | * internal component library : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmt/lib |
| | 76 | |
| | 77 | |
| | 78 | == 5) Limitation == |
| | 79 | |
| | 80 | This model has the following two limitations: |
| | 81 | * stopping criterion is disable; |
| | 82 | * fixed number of performed iterations. |
| | 83 | |
| | 84 | The number of performed iterations is fixed to a reasonable value still offering close-to-ideal Bit Error Rate (BER) performances. Please contact [http://www.turboconcept.com TurboConcept] for information about these limitations. |
| | 85 | |
| | 86 | == 6) License == |
| | 87 | |
| | 88 | The VCI wrapper is licensed under the SoCLib, GNU LGPLv2.1 license. |
| | 89 | |
| | 90 | The VCI wrapper instantiates an internal hardware decoder. This internal hardware decoder is licensed under BSD-like license. |
| | 91 | |
| | 92 | This internal hardware decoder is distributed in a binary form. |
| | 93 | |
| | 94 | == 7) RTL model == |
| | 95 | |
| | 96 | Please contact [http://www.turboconcept.com TurboConcept] for information about purchasing a fully functional RTL model of the internal hardware decoder. |