Changes between Version 25 and Version 26 of Component/Vci Block Device
- Timestamp:
- Sep 30, 2015, 12:01:23 PM (9 years ago)
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Component/Vci Block Device
v25 v26 13 13 * It is acting as an initiator to do the transfer 14 14 15 There is only one block device handled by this component. Both read and write 16 transfers are supported. 15 There is only one block device handled by this component. Both read and write transfers are supported. 17 16 An IRQ is optionally asserted when transfer is completed. 18 17 … … 20 19 as a default target. 21 20 22 It contains 8 memory-mappedregisters:21 It contains 9 memory-mapped, 32 bits registers: 23 22 24 23 * '''BLOCK_DEVICE_BUFFER''' (read/write) 25 Physical address of the source (or destination) buffer in SoC memory. 24 Physical address 32 LSB bits of the source (or destination) buffer in SoC memory. 25 26 * '''BLOCK_DEVICE_BUFFER_EXT''' (read/write) 27 Physical address 32 MSB bits of the source (or destination) buffer in SoC memory. 28 This register is only used in platform where the physical address width is larger than 32 bits. 26 29 27 30 * '''BLOCK_DEVICE_COUNT''' (read/write)