Changes between Version 25 and Version 26 of Component/Vci Block Device


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Timestamp:
Sep 30, 2015, 12:01:23 PM (9 years ago)
Author:
alain
Comment:

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  • Component/Vci Block Device

    v25 v26  
    1313 * It is acting as an initiator to do the transfer
    1414
    15 There is only one block device handled by this component. Both read and write
    16 transfers are supported.
     15There is only one block device handled by this component. Both read and write transfers are supported.
    1716An IRQ is optionally asserted when transfer is completed.
    1817
     
    2019as a default target.
    2120
    22 It contains 8 memory-mapped registers:
     21It contains 9 memory-mapped, 32 bits registers:
    2322
    2423 * '''BLOCK_DEVICE_BUFFER''' (read/write)
    25 Physical address of the source (or destination) buffer in SoC memory.
     24Physical address 32 LSB bits of the source (or destination) buffer in SoC memory.
     25
     26 * '''BLOCK_DEVICE_BUFFER_EXT''' (read/write)
     27Physical address 32 MSB bits of the source (or destination) buffer in SoC memory.
     28This register is only used in platform where the physical address width is larger than 32 bits.
    2629
    2730 * '''BLOCK_DEVICE_COUNT''' (read/write)