| | 1 | [wiki:Component SocLib Components General Index] |
| | 2 | |
| | 3 | = !VciIopic = |
| | 4 | |
| | 5 | == 1) Functional Description == |
| | 6 | |
| | 7 | This component is a multi-channels, programmable, Hardware Interrupt to Software Interrupt translator. It can be used to translate a variable number of hardware interrupt lines (HWI) to the same number of write triggered interrupt (SWI) that can be handled by a !VciXicu component. It acts as a VCI initiator, to send a single flit VCI packet to the target interrupt controller, when a rising edge is detected on a given HWI input. It acts also as a memory mapped VCI target, as the addresses of the WTI associated to a given HWI must be configured by the software. |
| | 8 | |
| | 9 | === 1.1) Programmer's view === |
| | 10 | |
| | 11 | For each HWI channel, there is three 32 bits addressable registers: |
| | 12 | |
| | 13 | '''IOPIC_ADDRESS''' This READ/WRITE register contains the 32 LSB bits of the physical WTI address associated to the HWI channel. |
| | 14 | |
| | 15 | '''IOPIC_EXTEND''' This READ/WRITE register contains the 32 MSB bits of the physical WTI address associated to the HWI channel. |
| | 16 | |
| | 17 | '''IOPIC_STATUS''' This READ-ONLY register register contains the HWI channel status. Only the two LSB bits are significant: |
| | 18 | * Bit 0 : HWI line current value. |
| | 19 | * Bit 1 : Error reported in a WTI transaction when tis bit is set. |
| | 20 | Any read access to the IOPIC status register reset the ERROR bit. |
| | 21 | |
| | 22 | == 2) Component definition & usage |
| | 23 | |
| | 24 | source:trunk/soclib/module/infrastructure_component/interrupt_infrastructure/vci_iopic/caba/metadata/vci_iopic.sd |
| | 25 | |
| | 26 | {{{ |
| | 27 | Uses( 'vci_iopic' ) |
| | 28 | }}} |
| | 29 | |
| | 30 | == 3) CABA Implementation == |
| | 31 | |
| | 32 | === CABA sources === |
| | 33 | |
| | 34 | * interface : source:trunk/soclib/soclib/module/infrastructure_component/interrupt_infrastructure/vci_iopic/caba/source/include/vci_iopic.h |
| | 35 | * implementation : source:trunk/soclib/soclib/module/infrastructure_component/interrupt_infrastructure/vci_iopic/caba/source/src/vci_iopic.cpp |
| | 36 | |
| | 37 | === CABA Constructor parameters === |
| | 38 | {{{ |
| | 39 | VciIopic( |
| | 40 | sc_module_name name, // Component Name |
| | 41 | const soclib::common::MappingTable &mt, // Mapping Table |
| | 42 | const soclib::common::IntTab &srcid, // Initiator index |
| | 43 | const soclib::common::IntTab &tgtid, // Target index |
| | 44 | const size_t channels ); // Number of HWI channels (inputs) |
| | 45 | }}} |
| | 46 | |
| | 47 | === CABA Ports === |
| | 48 | |
| | 49 | * sc_in<bool> '''p_clk''' : Global system clock |
| | 50 | * sc_in<bool> '''p_resetn''' : Global system reset |
| | 51 | * soclib::caba::!VciInitiator<vci_param> '''p_vci_initiator''' : VCI initiator port |
| | 52 | * soclib::caba::!VciTarget<vci_param> '''p_vci_target''' : VCI target port |
| | 53 | * sc_in<bool> *'''p_hwi''' : Input interrupts ports array |