87 | | || PTPR || set Page Table Pointer Register || Write || |
88 | | || TLB_EN || activates Data & Instruction TLBs || Write || |
89 | | || ICACHE_FLUSH || flush Instruction Cache || Write || |
90 | | || DCACHE_FLUSH || flush Data Cache || Write || |
91 | | || ITLB_INVAL || Instruction TLB line invalidate || Write || |
92 | | || DTLB_INVAL || Data TLB line invalidate || Write || |
93 | | || ICACHE_INVAL || Instruction Cache line invalidate || Write || |
94 | | || DCACHE_INVAL || Data Cache line invalidate || Write || |
95 | | || BAD_VADDR || Bad Virtual Address Register || Read || |
96 | | || ERR_TYPE || Exception type Register || Read || |
| 87 | || PTPR || set Page Table Pointer Register || Write || |
| 88 | || TLB_EN || set Data & Inst TLBs Mode Register || Write || |
| 89 | || ICACHE_FLUSH || Instruction Cache flush || Write || |
| 90 | || DCACHE_FLUSH || Data Cache flush || Write || |
| 91 | || ITLB_INVAL || Instruction TLB line invalidate || Write || |
| 92 | || DTLB_INVAL || Data TLB line invalidate || Write || |
| 93 | || ICACHE_INVAL || Instruction Cache line invalidate || Write || |
| 94 | || DCACHE_INVAL || Data Cache line invalidate || Write || |
| 95 | || BAD_VADDR || Bad Virtual Address Register || Read || |
| 96 | || ERR_TYPE || Exception type Register || Read || |