Changes between Version 1 and Version 2 of Tools/GAUT
- Timestamp:
- Feb 5, 2009, 6:22:25 PM (15 years ago)
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Tools/GAUT
v1 v2 7 7 Starting from a pure C function GAUT extracts the potential parallelism before selecting/allocating operators, scheduling and binding operations. 8 8 9 The mandatory design constraints are (1) the throughput (the initiation interval), (2) the clock period and (3) the target technology. The optional design constraints are I/O timing diagram and the memory mapping. 9 The mandatory design constraints are (1) the throughput (the initiation interval), (2) the clock period and (3) the target technology. 10 The optional design constraints are I/O timing diagram and the memory mapping. 10 11 11 GAUT synthesizes a potentially pipelined architecture composed of a processing unit, a memory unit, a communication and multiplexing unit and a GALS/LIS interface. 12 GAUT synthesizes a potentially pipelined architecture composed of a processing unit, a memory unit, a communication and multiplexing unit and 13 a GALS/LIS interface. 12 14 13 GAUT generates an IEEE P1076 compliant RTL level VHDL file. This VHDL file is an input for commercial, off the shelf, logical synthesis tools like ISE/Foundation from Xilinx and Design Compiler from Synopsys. 15 GAUT generates an IEEE P1076 compliant RTL level VHDL file. This VHDL file is an input for commercial, off the shelf, logical synthesis tools 16 like ISE/Foundation from Xilinx and Design Compiler from Synopsys. 14 17 15 18