1 | /* |
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2 | * SOCLIB_LGPL_HEADER_BEGIN |
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3 | * |
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4 | * This file is part of SoCLib, GNU LGPLv2.1. |
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5 | * |
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6 | * SoCLib is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU Lesser General Public License as published |
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8 | * by the Free Software Foundation; version 2.1 of the License. |
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9 | * |
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10 | * SoCLib is distributed in the hope that it will be useful, but |
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11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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13 | * Lesser General Public License for more details. |
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14 | * |
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15 | * You should have received a copy of the GNU Lesser General Public |
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16 | * License along with SoCLib; if not, write to the Free Software |
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17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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18 | * 02110-1301 USA |
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19 | * |
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20 | * SOCLIB_LGPL_HEADER_END |
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21 | * |
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22 | * Copyright (c) UPMC, Lip6, SoC |
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23 | * Nicolas Pouillon <nipo@ssji.net>, 2006-2007 |
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24 | * |
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25 | * Maintainers: nipo |
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26 | */ |
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27 | |
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28 | #include <iostream> |
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29 | #include <cstdlib> |
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30 | #include <cstdio> |
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31 | |
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32 | #include "mips32.h" |
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33 | #include "arm.h" |
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34 | #include "mapping_table.h" |
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35 | #include "gdbserver.h" |
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36 | #include "gdbserver2.h" |
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37 | #include "vci_xcache_wrapper.h" |
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38 | #include "vci_timer.h" |
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39 | #include "vci_framebuffer.h" |
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40 | #include "vci_fd_access.h" |
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41 | #include "vci_ram.h" |
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42 | #include "vci_multi_tty.h" |
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43 | #include "vci_locks.h" |
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44 | #include "vci_dma.h" |
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45 | #include "vci_dspin_network.h" |
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46 | #include "vci_local_crossbar.h" |
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47 | |
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48 | #include "segmentation.h" |
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49 | |
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50 | #define FB_WIDTH 256 |
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51 | #define FB_HEIGHT 144 |
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52 | |
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53 | using namespace std; |
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54 | using namespace sc_core; |
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55 | using namespace soclib::caba; |
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56 | using namespace soclib::common; |
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57 | |
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58 | typedef VciParams<4,6,32,1,1,1,8,1,1,1> vci_param; |
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59 | |
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60 | int _main(int argc, char *argv[]) |
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61 | { |
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62 | |
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63 | /* |
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64 | * Check the parameters : param 1 is the name of the simulated application. |
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65 | */ |
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66 | |
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67 | // if (argc != 3) |
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68 | // { |
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69 | // cout << "[PLATFORM] Wrong number of arguments." << endl; |
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70 | // cout << "Usage : ./simulation mips0_application_name mips1_application_name" << endl; |
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71 | // exit (-1); |
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72 | // } |
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73 | |
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74 | /* |
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75 | * Mapping table |
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76 | */ |
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77 | |
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78 | MappingTable maptab(32, IntTab(8,4), IntTab(8,4), 0x00300000); |
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79 | |
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80 | maptab.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0,0), false)); |
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81 | maptab.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0,0), false)); |
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82 | maptab.add(Segment("memory", MEMORY_BASE, MEMORY_SIZE , IntTab(0,0), false)); |
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83 | maptab.add(Segment("memory1", MEMORY_BASE1, MEMORY_SIZE1 , IntTab(1,0), false)); |
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84 | maptab.add(Segment("cmemory", CHANNEL_MEMORY_BASE, CHANNEL_MEMORY_SIZE , IntTab(2,0), false)); |
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85 | maptab.add(Segment("tty", TTY_BASE, TTY_SIZE, IntTab(3,0), false)); |
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86 | maptab.add(Segment("timer", TIMER_BASE, TIMER_SIZE, IntTab(4,0), false)); |
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87 | maptab.add(Segment("fb", FB_BASE, FB_SIZE, IntTab(5,0), false)); |
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88 | maptab.add(Segment("fd", FD_BASE, FD_SIZE, IntTab(6,0), false, true, IntTab(2))); |
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89 | maptab.add(Segment("locks", LOCKS_BASE, LOCKS_SIZE, IntTab(7,0), false)); |
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90 | maptab.add(Segment("dma", DMA_BASE, DMA_SIZE, IntTab(8,0), false)); |
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91 | |
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92 | MappingTable maptab1(32, IntTab(8,4), IntTab(8,4), 0x00300000); |
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93 | |
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94 | maptab1.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(1,0), false)); |
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95 | maptab1.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(1,0), false)); |
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96 | maptab1.add(Segment("memory", MEMORY_BASE, MEMORY_SIZE , IntTab(0,0), false)); |
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97 | maptab1.add(Segment("memory1", MEMORY_BASE1, MEMORY_SIZE1 , IntTab(1,0), false)); |
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98 | maptab1.add(Segment("cmemory", CHANNEL_MEMORY_BASE, CHANNEL_MEMORY_SIZE , IntTab(2,0), false)); |
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99 | maptab1.add(Segment("tty", TTY_BASE, TTY_SIZE, IntTab(3,0), false)); |
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100 | maptab1.add(Segment("timer", TIMER_BASE, TIMER_SIZE, IntTab(4,0), false)); |
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101 | maptab1.add(Segment("fb", FB_BASE, FB_SIZE, IntTab(5,0), false)); |
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102 | maptab1.add(Segment("fd", FD_BASE, FD_SIZE, IntTab(6,0), false, true, IntTab(2))); |
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103 | maptab1.add(Segment("locks", LOCKS_BASE, LOCKS_SIZE, IntTab(7,0), false)); |
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104 | maptab1.add(Segment("dma", DMA_BASE, DMA_SIZE, IntTab(8,0), false)); |
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105 | |
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106 | |
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107 | |
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108 | /* |
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109 | * Signals |
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110 | */ |
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111 | |
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112 | sc_clock signal_clk("signal_clk"); |
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113 | sc_signal<bool> signal_resetn("signal_resetn"); |
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114 | |
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115 | sc_signal<bool> signal_fd_it("signal_fd_it"); |
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116 | sc_signal<bool> signal_mips0_it0("signal_mips0_it0"); |
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117 | sc_signal<bool> signal_mips0_it1("signal_mips0_it1"); |
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118 | sc_signal<bool> signal_mips0_it2("signal_mips0_it2"); |
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119 | sc_signal<bool> signal_mips0_it3("signal_mips0_it3"); |
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120 | sc_signal<bool> signal_mips0_it4("signal_mips0_it4"); |
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121 | sc_signal<bool> signal_mips0_it5("signal_mips0_it5"); |
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122 | |
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123 | sc_signal<bool> signal_mips1_it0("signal_mips1_it0"); |
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124 | sc_signal<bool> signal_mips1_it1("signal_mips1_it1"); |
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125 | sc_signal<bool> signal_mips1_it2("signal_mips1_it2"); |
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126 | sc_signal<bool> signal_mips1_it3("signal_mips1_it3"); |
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127 | sc_signal<bool> signal_mips1_it4("signal_mips1_it4"); |
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128 | sc_signal<bool> signal_mips1_it5("signal_mips1_it5"); |
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129 | VciSignals<vci_param> signal_vci_m0("signal_vci_m0"); |
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130 | VciSignals<vci_param> signal_vci_m1("signal_vci_m1"); |
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131 | |
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132 | |
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133 | |
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134 | VciSignals<vci_param> signal_vci_vcimultiram0("signal_vci_vcimultiram0"); |
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135 | VciSignals<vci_param> signal_vci_vcimultiram1("signal_vci_vcimultiram1"); |
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136 | VciSignals<vci_param> signal_vci_vcicram0("signal_vci_vcicram0"); |
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137 | VciSignals<vci_param> signal_vci_tty("signal_vci_tty"); |
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138 | VciSignals<vci_param> signal_vci_timer("signal_vci_timer"); |
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139 | VciSignals<vci_param> signal_vci_framebuffer("signal_vci_framebuffer"); |
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140 | VciSignals<vci_param> signal_vci_fd_i("signal_vci_fd_i"); |
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141 | VciSignals<vci_param> signal_vci_fd_t("signal_vci_fd_t"); |
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142 | soclib::caba::VciSignals<vci_param> signal_vci_dmai("signal_vci_dmai"); |
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143 | soclib::caba::VciSignals<vci_param> signal_vci_dmat("signal_vci_dmat"); |
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144 | soclib::caba::VciSignals<vci_param> signal_vci_locks("signal_vci_locks"); |
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145 | |
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146 | |
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147 | /* |
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148 | * Processors |
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149 | */ |
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150 | |
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151 | VciXcacheWrapper<vci_param, GdbServer<Mips32ElIss> > cache0("cache0", 0, maptab,IntTab(0x00,0), 4,1,8, 4,1,8); |
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152 | VciXcacheWrapper<vci_param, GdbServer<Mips32ElIss> > cache1("cache1", 1, maptab1,IntTab(0x01,0), 4,1,8, 4,1,8); |
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153 | |
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154 | cache0 . p_clk(signal_clk); |
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155 | cache0 . p_resetn(signal_resetn); |
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156 | cache0 . p_vci(signal_vci_m0); |
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157 | cache0 . p_irq[0](signal_mips0_it0); |
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158 | cache0 . p_irq[1](signal_mips0_it1); |
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159 | cache0 . p_irq[2](signal_mips0_it2); |
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160 | cache0 . p_irq[3](signal_mips0_it3); |
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161 | cache0 . p_irq[4](signal_mips0_it4); |
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162 | cache0 . p_irq[5](signal_mips0_it5); |
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163 | |
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164 | cache1 . p_clk(signal_clk); |
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165 | cache1 . p_resetn(signal_resetn); |
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166 | cache1 . p_vci(signal_vci_m1); |
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167 | cache1 . p_irq[0](signal_mips1_it0); |
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168 | cache1 . p_irq[1](signal_mips1_it1); |
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169 | cache1 . p_irq[2](signal_mips1_it2); |
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170 | cache1 . p_irq[3](signal_mips1_it3); |
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171 | cache1 . p_irq[4](signal_mips1_it4); |
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172 | cache1 . p_irq[5](signal_mips1_it5); |
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173 | |
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174 | /* |
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175 | * Memory |
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176 | */ |
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177 | |
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178 | Loader loader0("MJPEG0.x"); |
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179 | //Loader loader0(argv[1]); |
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180 | VciRam<vci_param> vcimultiram0("vcimultiram0", IntTab(0,0), maptab, loader0); |
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181 | |
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182 | Loader loader1("MJPEG1.x"); |
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183 | //Loader loader1(argv[2]); |
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184 | VciRam<vci_param> vcimultiram1("vcimultiram1", IntTab(1,0), maptab1, loader1); |
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185 | |
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186 | vcimultiram0 . p_clk(signal_clk); |
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187 | vcimultiram0 . p_resetn(signal_resetn); |
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188 | vcimultiram0 . p_vci(signal_vci_vcimultiram0); |
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189 | |
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190 | vcimultiram1 . p_clk(signal_clk); |
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191 | vcimultiram1 . p_resetn(signal_resetn); |
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192 | vcimultiram1 . p_vci(signal_vci_vcimultiram1); |
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193 | |
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194 | |
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195 | |
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196 | /* |
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197 | * Channel Memory |
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198 | */ |
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199 | |
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200 | VciRam<vci_param> vcicram0("vcicmemory", IntTab(2, 0), maptab, loader0); |
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201 | |
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202 | vcicram0 . p_clk(signal_clk); |
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203 | vcicram0 . p_resetn(signal_resetn); |
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204 | vcicram0 . p_vci(signal_vci_vcicram0); |
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205 | |
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206 | |
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207 | |
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208 | /* |
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209 | * TTY |
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210 | */ |
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211 | |
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212 | VciMultiTty<vci_param> vcitty("vcitty", IntTab(3,0), maptab, "tty0", "tty1","tty2", "tty3", NULL); |
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213 | |
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214 | vcitty . p_clk (signal_clk); |
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215 | vcitty . p_resetn (signal_resetn); |
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216 | vcitty . p_vci (signal_vci_tty); |
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217 | vcitty . p_irq[0] (signal_mips0_it1); |
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218 | vcitty . p_irq[1] (signal_mips0_it2); |
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219 | vcitty . p_irq[2] (signal_mips1_it1); |
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220 | vcitty . p_irq[3] (signal_mips1_it2); |
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221 | |
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222 | /* |
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223 | * Timer |
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224 | */ |
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225 | |
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226 | VciTimer<vci_param> vcitimer("vcittimer", IntTab(4,0), maptab, 2); |
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227 | |
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228 | vcitimer . p_clk (signal_clk); |
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229 | vcitimer . p_resetn (signal_resetn); |
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230 | vcitimer . p_vci (signal_vci_timer); |
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231 | |
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232 | vcitimer . p_irq[0] (signal_mips0_it0); |
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233 | vcitimer . p_irq[1] (signal_mips1_it0); |
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234 | |
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235 | /* |
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236 | <<<<<<< HEAD:top.cpp |
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237 | * Framebuffer |
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238 | */ |
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239 | |
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240 | VciFrameBuffer<vci_param> vcifb("fb0", IntTab(5,0), maptab, FB_WIDTH, FB_HEIGHT); |
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241 | |
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242 | vcifb . p_clk (signal_clk); |
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243 | vcifb . p_resetn (signal_resetn); |
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244 | vcifb . p_vci (signal_vci_framebuffer); |
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245 | |
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246 | /* |
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247 | * FD |
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248 | */ |
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249 | |
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250 | VciFdAccess<vci_param> vcifd("vcifd", maptab, IntTab(6,0), IntTab(6,0)); |
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251 | |
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252 | vcifd . p_clk (signal_clk); |
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253 | vcifd . p_resetn (signal_resetn); |
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254 | vcifd . p_vci_initiator (signal_vci_fd_i); |
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255 | vcifd . p_vci_target (signal_vci_fd_t); |
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256 | vcifd . p_irq (signal_fd_it); |
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257 | |
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258 | /* |
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259 | * LOCKS |
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260 | */ |
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261 | |
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262 | soclib::caba::VciLocks<vci_param> vcilocks("vcilocks", IntTab(7,0), maptab); |
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263 | |
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264 | |
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265 | vcilocks.p_clk(signal_clk); |
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266 | vcilocks.p_resetn(signal_resetn); |
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267 | vcilocks.p_vci(signal_vci_locks); |
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268 | /* |
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269 | * DMA |
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270 | */ |
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271 | |
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272 | soclib::caba::VciDma<vci_param> vcidma("vcidma", maptab, IntTab(8,0), IntTab(8,0), (1<<(vci_param::K-1))); |
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273 | |
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274 | |
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275 | vcidma.p_clk(signal_clk); |
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276 | vcidma.p_resetn(signal_resetn); |
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277 | vcidma.p_vci_target(signal_vci_dmat); |
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278 | vcidma.p_vci_initiator(signal_vci_dmai); |
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279 | vcidma.p_irq(signal_mips0_it3); |
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280 | |
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281 | |
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282 | |
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283 | /* |
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284 | * Network |
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285 | */ |
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286 | soclib::caba::VciSignals<vci_param> signal_vci_C00_I("signal_vci_C00_I"); |
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287 | soclib::caba::VciSignals<vci_param> signal_vci_C01_I("signal_vci_C01_I"); |
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288 | soclib::caba::VciSignals<vci_param> signal_vci_C02_I("signal_vci_C02_I"); |
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289 | soclib::caba::VciSignals<vci_param> signal_vci_C10_I("signal_vci_C10_I"); |
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290 | soclib::caba::VciSignals<vci_param> signal_vci_C11_I("signal_vci_C11_I"); |
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291 | soclib::caba::VciSignals<vci_param> signal_vci_C12_I("signal_vci_C12_I"); |
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292 | soclib::caba::VciSignals<vci_param> signal_vci_C20_I("signal_vci_C20_I"); |
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293 | soclib::caba::VciSignals<vci_param> signal_vci_C21_I("signal_vci_C21_I"); |
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294 | |
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295 | soclib::caba::VciSignals<vci_param> signal_vci_C00_T("signal_vci_C00_T"); |
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296 | soclib::caba::VciSignals<vci_param> signal_vci_C01_T("signal_vci_C01_T"); |
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297 | |
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298 | |
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299 | |
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300 | |
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301 | |
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302 | //Cluster [0,0] : mips0, ram |
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303 | soclib::caba::VciLocalCrossbar<vci_param> cluster00("cluster00",maptab, IntTab(0), IntTab(0), 1, 1 ); |
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304 | // Cluster [0,1] : mips1 , ram |
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305 | soclib::caba::VciLocalCrossbar<vci_param> cluster01("cluster01",maptab, IntTab(1), IntTab(1), 1, 1 ); |
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306 | |
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307 | soclib::caba::VciDspinNetwork<vci_param, 4, 4> vciDspinNetwork("vciDspinNetwork", maptab, 3, 3); |
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308 | |
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309 | vciDspinNetwork . p_clk(signal_clk); |
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310 | vciDspinNetwork . p_resetn(signal_resetn); |
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311 | |
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312 | //Cluster00 |
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313 | cluster00.p_clk(signal_clk); |
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314 | cluster00.p_resetn(signal_resetn); |
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315 | cluster00.p_to_target[0](signal_vci_vcimultiram0); |
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316 | cluster00.p_to_initiator[0](signal_vci_m0); |
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317 | cluster00.p_target_to_up(signal_vci_C00_T); |
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318 | cluster00.p_initiator_to_up(signal_vci_C00_I); |
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319 | vciDspinNetwork.p_to_initiator[0][0](signal_vci_C00_I); |
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320 | vciDspinNetwork.p_to_target[0][0](signal_vci_C00_T); |
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321 | |
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322 | //Cluster01 |
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323 | cluster01.p_clk(signal_clk); |
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324 | cluster01.p_resetn(signal_resetn); |
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325 | cluster01.p_to_target[0](signal_vci_vcimultiram1); |
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326 | cluster01.p_to_initiator[0](signal_vci_m1); |
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327 | cluster01.p_target_to_up(signal_vci_C01_T); |
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328 | cluster01.p_initiator_to_up(signal_vci_C01_I); |
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329 | vciDspinNetwork.p_to_initiator[0][1](signal_vci_C01_I); |
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330 | vciDspinNetwork.p_to_target[0][1](signal_vci_C01_T); |
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331 | |
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332 | //Cluster02: channel memory |
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333 | vciDspinNetwork.p_to_initiator[0][2](signal_vci_C02_I); |
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334 | vciDspinNetwork.p_to_target[0][2](signal_vci_vcicram0); |
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335 | |
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336 | //Cluster10: tty |
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337 | vciDspinNetwork.p_to_initiator[1][0](signal_vci_C10_I); |
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338 | vciDspinNetwork.p_to_target[1][0](signal_vci_tty); |
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339 | |
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340 | //Cluster11: timer |
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341 | vciDspinNetwork.p_to_initiator[1][1](signal_vci_C11_I); |
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342 | vciDspinNetwork.p_to_target[1][1](signal_vci_timer); |
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343 | |
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344 | //Cluster12: fb |
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345 | vciDspinNetwork.p_to_initiator[1][2](signal_vci_C12_I); |
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346 | vciDspinNetwork.p_to_target[1][2](signal_vci_framebuffer); |
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347 | |
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348 | //Cluster12: fd |
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349 | vciDspinNetwork.p_to_initiator[2][0](signal_vci_fd_i); |
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350 | vciDspinNetwork.p_to_target[2][0](signal_vci_fd_t); |
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351 | //Cluster12: locks |
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352 | vciDspinNetwork.p_to_initiator[2][1](signal_vci_C21_I); |
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353 | vciDspinNetwork.p_to_target[2][1](signal_vci_locks); |
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354 | |
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355 | //Cluster22: dma |
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356 | vciDspinNetwork.p_to_initiator[2][2](signal_vci_dmai); |
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357 | vciDspinNetwork.p_to_target[2][2](signal_vci_dmat); |
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358 | |
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359 | |
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360 | /* |
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361 | * Start of simulation |
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362 | */ |
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363 | |
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364 | sc_start(sc_core::sc_time(0, SC_NS)); |
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365 | signal_resetn = false; |
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366 | |
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367 | sc_start(sc_core::sc_time(1, SC_NS)); |
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368 | signal_resetn = true; |
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369 | |
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370 | // if (n_cycles == -1) |
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371 | // { |
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372 | sc_start(); |
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373 | // } |
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374 | // else |
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375 | // { |
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376 | // sc_start(sc_core::sc_time(n_cycles, SC_NS)); |
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377 | // } |
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378 | |
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379 | return EXIT_SUCCESS; |
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380 | } |
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381 | |
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382 | int sc_main (int argc, char *argv[]) |
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383 | { |
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384 | try |
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385 | { |
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386 | return _main(argc, argv); |
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387 | } |
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388 | catch (exception &e) |
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389 | { |
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390 | cout << e.what() << endl; |
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391 | } |
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392 | catch (...) |
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393 | { |
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394 | cout << "Unknown exception occured" << endl; |
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395 | throw; |
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396 | } |
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397 | |
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398 | return 1; |
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399 | } |
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