Ticket #27: top.cpp

File top.cpp, 12.5 KB (added by alexandre.chagoya-garzon@…, 16 years ago)
Line 
1/*
2 * SOCLIB_LGPL_HEADER_BEGIN
3 *
4 * This file is part of SoCLib, GNU LGPLv2.1.
5 *
6 * SoCLib is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; version 2.1 of the License.
9 *
10 * SoCLib is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with SoCLib; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 * SOCLIB_LGPL_HEADER_END
21 *
22 * Copyright (c) UPMC, Lip6, SoC
23 *         Nicolas Pouillon <nipo@ssji.net>, 2006-2007
24 *
25 * Maintainers: nipo
26 */
27
28#include <iostream>
29#include <cstdlib>
30#include <cstdio>
31
32#include "mips32.h"
33#include "arm.h"
34#include "mapping_table.h"
35#include "gdbserver.h"
36#include "gdbserver2.h"
37#include "vci_xcache_wrapper.h"
38#include "vci_timer.h"
39#include "vci_framebuffer.h"
40#include "vci_fd_access.h"
41#include "vci_ram.h"
42#include "vci_multi_tty.h"
43#include "vci_locks.h"
44#include "vci_dma.h"
45#include "vci_dspin_network.h"
46#include "vci_local_crossbar.h"
47
48#include "segmentation.h"
49
50#define FB_WIDTH 256
51#define FB_HEIGHT 144
52
53using namespace std;
54using namespace sc_core;
55using namespace soclib::caba;
56using namespace soclib::common;
57
58typedef VciParams<4,6,32,1,1,1,8,1,1,1> vci_param;
59
60int _main(int argc, char *argv[])
61{
62
63  /*
64   * Check the parameters : param 1 is the name of the simulated application.
65   */
66
67//  if (argc != 3)
68//  {
69//    cout << "[PLATFORM] Wrong number of arguments." << endl;
70//    cout << "Usage : ./simulation mips0_application_name mips1_application_name" << endl;
71//    exit (-1);
72//  }
73
74  /*
75   * Mapping table
76   */
77
78  MappingTable maptab(32, IntTab(8,4), IntTab(8,4), 0x00300000);
79
80  maptab.add(Segment("reset",  RESET_BASE,  RESET_SIZE,   IntTab(0,0), false));
81  maptab.add(Segment("excep",  EXCEP_BASE,  EXCEP_SIZE,   IntTab(0,0), false));
82  maptab.add(Segment("memory", MEMORY_BASE, MEMORY_SIZE , IntTab(0,0), false));
83  maptab.add(Segment("memory1", MEMORY_BASE1, MEMORY_SIZE1 , IntTab(1,0), false));
84  maptab.add(Segment("cmemory", CHANNEL_MEMORY_BASE, CHANNEL_MEMORY_SIZE , IntTab(2,0), false));
85  maptab.add(Segment("tty",    TTY_BASE,    TTY_SIZE,     IntTab(3,0), false));
86  maptab.add(Segment("timer",  TIMER_BASE,  TIMER_SIZE,   IntTab(4,0), false));
87  maptab.add(Segment("fb",     FB_BASE,     FB_SIZE,      IntTab(5,0), false));
88  maptab.add(Segment("fd",     FD_BASE,     FD_SIZE,      IntTab(6,0), false, true, IntTab(2)));
89  maptab.add(Segment("locks", LOCKS_BASE, LOCKS_SIZE, IntTab(7,0), false));
90  maptab.add(Segment("dma",     DMA_BASE,     DMA_SIZE,     IntTab(8,0), false));
91
92  MappingTable maptab1(32, IntTab(8,4), IntTab(8,4), 0x00300000);
93
94  maptab1.add(Segment("reset",  RESET_BASE,  RESET_SIZE,   IntTab(1,0), false));
95  maptab1.add(Segment("excep",  EXCEP_BASE,  EXCEP_SIZE,   IntTab(1,0), false));
96  maptab1.add(Segment("memory", MEMORY_BASE, MEMORY_SIZE , IntTab(0,0), false));
97  maptab1.add(Segment("memory1", MEMORY_BASE1, MEMORY_SIZE1 , IntTab(1,0), false));
98  maptab1.add(Segment("cmemory", CHANNEL_MEMORY_BASE, CHANNEL_MEMORY_SIZE , IntTab(2,0), false));
99  maptab1.add(Segment("tty",    TTY_BASE,    TTY_SIZE,     IntTab(3,0), false));
100  maptab1.add(Segment("timer",  TIMER_BASE,  TIMER_SIZE,   IntTab(4,0), false));
101  maptab1.add(Segment("fb",     FB_BASE,     FB_SIZE,      IntTab(5,0), false));
102  maptab1.add(Segment("fd",     FD_BASE,     FD_SIZE,      IntTab(6,0), false, true, IntTab(2)));
103  maptab1.add(Segment("locks", LOCKS_BASE, LOCKS_SIZE, IntTab(7,0), false));
104  maptab1.add(Segment("dma",     DMA_BASE,     DMA_SIZE,     IntTab(8,0), false));
105
106
107
108  /*
109   * Signals
110   */
111
112  sc_clock signal_clk("signal_clk");
113  sc_signal<bool> signal_resetn("signal_resetn");
114
115  sc_signal<bool> signal_fd_it("signal_fd_it");
116  sc_signal<bool>  signal_mips0_it0("signal_mips0_it0");
117  sc_signal<bool>  signal_mips0_it1("signal_mips0_it1");
118  sc_signal<bool>  signal_mips0_it2("signal_mips0_it2");
119  sc_signal<bool>  signal_mips0_it3("signal_mips0_it3");
120  sc_signal<bool>  signal_mips0_it4("signal_mips0_it4");
121  sc_signal<bool>  signal_mips0_it5("signal_mips0_it5");
122
123  sc_signal<bool> signal_mips1_it0("signal_mips1_it0"); 
124  sc_signal<bool> signal_mips1_it1("signal_mips1_it1"); 
125  sc_signal<bool> signal_mips1_it2("signal_mips1_it2"); 
126  sc_signal<bool> signal_mips1_it3("signal_mips1_it3"); 
127  sc_signal<bool> signal_mips1_it4("signal_mips1_it4"); 
128  sc_signal<bool> signal_mips1_it5("signal_mips1_it5");
129  VciSignals<vci_param>  signal_vci_m0("signal_vci_m0");
130  VciSignals<vci_param>  signal_vci_m1("signal_vci_m1");
131
132
133
134  VciSignals<vci_param> signal_vci_vcimultiram0("signal_vci_vcimultiram0");
135  VciSignals<vci_param> signal_vci_vcimultiram1("signal_vci_vcimultiram1");
136  VciSignals<vci_param> signal_vci_vcicram0("signal_vci_vcicram0");
137  VciSignals<vci_param> signal_vci_tty("signal_vci_tty");
138  VciSignals<vci_param> signal_vci_timer("signal_vci_timer");
139  VciSignals<vci_param> signal_vci_framebuffer("signal_vci_framebuffer");
140  VciSignals<vci_param> signal_vci_fd_i("signal_vci_fd_i");
141  VciSignals<vci_param> signal_vci_fd_t("signal_vci_fd_t");
142  soclib::caba::VciSignals<vci_param> signal_vci_dmai("signal_vci_dmai");
143  soclib::caba::VciSignals<vci_param> signal_vci_dmat("signal_vci_dmat");
144  soclib::caba::VciSignals<vci_param> signal_vci_locks("signal_vci_locks");
145
146
147    /*
148     * Processors
149     */
150
151    VciXcacheWrapper<vci_param, GdbServer<Mips32ElIss> >  cache0("cache0", 0, maptab,IntTab(0x00,0), 4,1,8, 4,1,8);
152    VciXcacheWrapper<vci_param, GdbServer<Mips32ElIss> >  cache1("cache1", 1, maptab1,IntTab(0x01,0), 4,1,8, 4,1,8);
153
154    cache0 . p_clk(signal_clk);
155    cache0 . p_resetn(signal_resetn);
156    cache0 . p_vci(signal_vci_m0);
157    cache0 . p_irq[0](signal_mips0_it0);
158    cache0 . p_irq[1](signal_mips0_it1);
159    cache0 . p_irq[2](signal_mips0_it2);
160    cache0 . p_irq[3](signal_mips0_it3);
161    cache0 . p_irq[4](signal_mips0_it4);
162    cache0 . p_irq[5](signal_mips0_it5);
163
164    cache1 . p_clk(signal_clk);
165    cache1 . p_resetn(signal_resetn);
166    cache1 . p_vci(signal_vci_m1);
167    cache1 . p_irq[0](signal_mips1_it0);
168    cache1 . p_irq[1](signal_mips1_it1);
169    cache1 . p_irq[2](signal_mips1_it2);
170    cache1 . p_irq[3](signal_mips1_it3);
171    cache1 . p_irq[4](signal_mips1_it4);
172    cache1 . p_irq[5](signal_mips1_it5);
173
174/*
175 * Memory
176 */
177
178Loader loader0("MJPEG0.x");
179//Loader loader0(argv[1]);
180VciRam<vci_param> vcimultiram0("vcimultiram0", IntTab(0,0), maptab, loader0);
181
182Loader loader1("MJPEG1.x");
183//Loader loader1(argv[2]);
184VciRam<vci_param> vcimultiram1("vcimultiram1", IntTab(1,0), maptab1, loader1);
185
186vcimultiram0 . p_clk(signal_clk);
187vcimultiram0 . p_resetn(signal_resetn);
188vcimultiram0 . p_vci(signal_vci_vcimultiram0);
189
190vcimultiram1 . p_clk(signal_clk);
191vcimultiram1 . p_resetn(signal_resetn);
192vcimultiram1 . p_vci(signal_vci_vcimultiram1);
193
194
195
196/*
197 * Channel Memory
198 */
199
200VciRam<vci_param> vcicram0("vcicmemory", IntTab(2, 0), maptab, loader0);
201
202vcicram0 . p_clk(signal_clk);
203vcicram0 . p_resetn(signal_resetn);
204vcicram0 . p_vci(signal_vci_vcicram0);
205
206
207
208/*
209 * TTY
210 */
211
212VciMultiTty<vci_param> vcitty("vcitty", IntTab(3,0), maptab, "tty0", "tty1","tty2", "tty3",  NULL);
213
214vcitty . p_clk (signal_clk);
215vcitty . p_resetn (signal_resetn);
216vcitty . p_vci (signal_vci_tty);
217vcitty . p_irq[0] (signal_mips0_it1); 
218vcitty . p_irq[1] (signal_mips0_it2);
219vcitty . p_irq[2] (signal_mips1_it1); 
220vcitty . p_irq[3] (signal_mips1_it2);
221
222/*
223 * Timer
224 */
225
226VciTimer<vci_param> vcitimer("vcittimer", IntTab(4,0), maptab, 2);
227
228vcitimer . p_clk (signal_clk);
229vcitimer . p_resetn (signal_resetn);
230vcitimer . p_vci (signal_vci_timer);
231
232vcitimer . p_irq[0] (signal_mips0_it0); 
233vcitimer . p_irq[1] (signal_mips1_it0); 
234
235/*
236   <<<<<<< HEAD:top.cpp
237 * Framebuffer
238 */
239
240VciFrameBuffer<vci_param> vcifb("fb0", IntTab(5,0), maptab, FB_WIDTH, FB_HEIGHT);
241
242vcifb . p_clk (signal_clk);
243vcifb . p_resetn (signal_resetn);
244vcifb . p_vci (signal_vci_framebuffer);
245
246/*
247 * FD
248   */
249
250        VciFdAccess<vci_param> vcifd("vcifd", maptab, IntTab(6,0), IntTab(6,0));
251
252        vcifd . p_clk (signal_clk);
253        vcifd . p_resetn (signal_resetn);
254        vcifd . p_vci_initiator (signal_vci_fd_i);
255        vcifd . p_vci_target (signal_vci_fd_t);
256        vcifd . p_irq (signal_fd_it); 
257
258/*
259   * LOCKS
260   */
261
262        soclib::caba::VciLocks<vci_param> vcilocks("vcilocks", IntTab(7,0), maptab); 
263
264
265        vcilocks.p_clk(signal_clk);
266        vcilocks.p_resetn(signal_resetn);
267        vcilocks.p_vci(signal_vci_locks);
268/*
269   * DMA
270   */
271
272        soclib::caba::VciDma<vci_param> vcidma("vcidma", maptab, IntTab(8,0), IntTab(8,0), (1<<(vci_param::K-1))); 
273
274
275        vcidma.p_clk(signal_clk);
276        vcidma.p_resetn(signal_resetn);
277        vcidma.p_vci_target(signal_vci_dmat);
278        vcidma.p_vci_initiator(signal_vci_dmai);
279        vcidma.p_irq(signal_mips0_it3);
280
281
282
283  /*
284   * Network
285   */
286    soclib::caba::VciSignals<vci_param> signal_vci_C00_I("signal_vci_C00_I");
287    soclib::caba::VciSignals<vci_param> signal_vci_C01_I("signal_vci_C01_I");
288    soclib::caba::VciSignals<vci_param> signal_vci_C02_I("signal_vci_C02_I");
289    soclib::caba::VciSignals<vci_param> signal_vci_C10_I("signal_vci_C10_I");
290    soclib::caba::VciSignals<vci_param> signal_vci_C11_I("signal_vci_C11_I");
291    soclib::caba::VciSignals<vci_param> signal_vci_C12_I("signal_vci_C12_I");
292    soclib::caba::VciSignals<vci_param> signal_vci_C20_I("signal_vci_C20_I");
293    soclib::caba::VciSignals<vci_param> signal_vci_C21_I("signal_vci_C21_I");
294
295    soclib::caba::VciSignals<vci_param> signal_vci_C00_T("signal_vci_C00_T");
296    soclib::caba::VciSignals<vci_param> signal_vci_C01_T("signal_vci_C01_T");
297
298
299
300
301
302    //Cluster [0,0] : mips0, ram
303    soclib::caba::VciLocalCrossbar<vci_param> cluster00("cluster00",maptab, IntTab(0), IntTab(0), 1, 1 );
304  // Cluster [0,1] : mips1 , ram
305    soclib::caba::VciLocalCrossbar<vci_param> cluster01("cluster01",maptab, IntTab(1), IntTab(1), 1, 1 );
306
307    soclib::caba::VciDspinNetwork<vci_param, 4, 4> vciDspinNetwork("vciDspinNetwork", maptab, 3, 3);
308
309    vciDspinNetwork . p_clk(signal_clk);
310    vciDspinNetwork . p_resetn(signal_resetn);
311
312//Cluster00
313    cluster00.p_clk(signal_clk);
314    cluster00.p_resetn(signal_resetn);
315    cluster00.p_to_target[0](signal_vci_vcimultiram0);
316    cluster00.p_to_initiator[0](signal_vci_m0);
317    cluster00.p_target_to_up(signal_vci_C00_T);
318    cluster00.p_initiator_to_up(signal_vci_C00_I);
319    vciDspinNetwork.p_to_initiator[0][0](signal_vci_C00_I);
320    vciDspinNetwork.p_to_target[0][0](signal_vci_C00_T);
321
322//Cluster01
323    cluster01.p_clk(signal_clk);
324    cluster01.p_resetn(signal_resetn);
325    cluster01.p_to_target[0](signal_vci_vcimultiram1);
326    cluster01.p_to_initiator[0](signal_vci_m1);
327    cluster01.p_target_to_up(signal_vci_C01_T);
328    cluster01.p_initiator_to_up(signal_vci_C01_I);
329    vciDspinNetwork.p_to_initiator[0][1](signal_vci_C01_I);
330    vciDspinNetwork.p_to_target[0][1](signal_vci_C01_T);
331
332//Cluster02: channel memory
333    vciDspinNetwork.p_to_initiator[0][2](signal_vci_C02_I);
334    vciDspinNetwork.p_to_target[0][2](signal_vci_vcicram0);
335   
336//Cluster10: tty
337    vciDspinNetwork.p_to_initiator[1][0](signal_vci_C10_I);
338    vciDspinNetwork.p_to_target[1][0](signal_vci_tty);
339
340//Cluster11: timer
341    vciDspinNetwork.p_to_initiator[1][1](signal_vci_C11_I);
342    vciDspinNetwork.p_to_target[1][1](signal_vci_timer);
343
344//Cluster12: fb
345    vciDspinNetwork.p_to_initiator[1][2](signal_vci_C12_I);
346    vciDspinNetwork.p_to_target[1][2](signal_vci_framebuffer);
347
348//Cluster12: fd
349    vciDspinNetwork.p_to_initiator[2][0](signal_vci_fd_i);
350    vciDspinNetwork.p_to_target[2][0](signal_vci_fd_t);
351//Cluster12: locks
352    vciDspinNetwork.p_to_initiator[2][1](signal_vci_C21_I);
353    vciDspinNetwork.p_to_target[2][1](signal_vci_locks);
354
355//Cluster22: dma
356    vciDspinNetwork.p_to_initiator[2][2](signal_vci_dmai);
357    vciDspinNetwork.p_to_target[2][2](signal_vci_dmat);
358
359
360        /*
361         * Start of simulation
362         */
363
364        sc_start(sc_core::sc_time(0, SC_NS));
365        signal_resetn = false;
366
367        sc_start(sc_core::sc_time(1, SC_NS));
368        signal_resetn = true;
369
370       // if (n_cycles == -1)
371       // {
372            sc_start();
373       // }
374       // else
375       // {
376         //   sc_start(sc_core::sc_time(n_cycles, SC_NS));
377       // }
378
379        return EXIT_SUCCESS;
380}
381
382int sc_main (int argc, char *argv[])
383{
384    try
385    {
386        return _main(argc, argv);
387    }
388    catch (exception &e)
389    {
390        cout << e.what() << endl;
391    }
392    catch (...)
393    {
394        cout << "Unknown exception occured" << endl;
395        throw;
396    }
397
398    return 1;
399}