Custom Query (93 matches)

Hello, I have a problem when initiating a DMA transfer. I attached the platform (top.cpp, segmentation.h, platform_desc) and the application (MJPEG.x)

Everything runs smoothly, until a DMA transfer is initiated: [fetch_process] Send SOF info to LIBU and IDCT DMA transfer from 0x1004e620 to 0x1005779c (8 bytes)

I verified in vci_dma.cpp 134 VciInitSimpleReadReq<vci_param> *req = 135 new VciInitSimpleReadReq<vci_param>( 136 &m_data[0], m_src+m_offset, burst ); The correct src address is used, but on te next transition, a segmentation fault appears

Program received signal SIGSEGV, Segmentation fault. [Switching to Thread -1210737792 (LWP 5494)] soclib::caba::VciVgmn<soclib::caba::VciParams<4, 6, 32, 1, 1, 1, 8, 1, 1, 1> >::genMoore (this=0xbf948fb8)

at /tima/amazone-home1/chagoyag/Workspace/soclib/soclib/module/network_component/vci_vgmn/caba/source/src/vci_vgmn.cpp:380

380 can_take |= !m_dest->full();

I use compiler gcc (GCC) 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)

Thank you for your help Alexandre

Hi, I am trying to write a multi-processor platform with private program memories, and I was trying to figure out if this was possible with SOCLIB. I made a try with 2 Mips in a first phase, with two associated mapping tables. The difference between both mappings is the MEMORY address, 0x10000000 for Mips0 and 0x20000000 for Mips1. I created two loaders taking different binaries, the reset section of the first jumps to 0x10xxxx and the second jumps to 0x20xxx.

Loader loader0("MJPEG0.x");

VciRam<vci_param> vcimultiram0("vcimultiram0", IntTab(0,0), maptab, loader0);

Loader loader1("MJPEG1.x");

VciRam<vci_param> vcimultiram1("vcimultiram1", IntTab(1,0), maptab1, loader1);

MJPEG0.x:

211735 bfc00020: 3c1b1001 lui k1,0x1001

211736 bfc00024: 277bf360 addiu k1,k1,-3232

MJPEG1.x:

202290 bfc00020: 3c1b2001 lui k1,0x2001

202291 bfc00024: 277bb820 addiu k1,k1,-18400

However, when I execute the simulation, I see that cache1 seems to execute the reset section of MJPEG0.x.

cache0 PC: 0xbfc00020 NPC: 0xbfc00024 Ins: 0x3c1b1001

cache0 PC: 0xbfc00024 NPC: 0xbfc00028 Ins: 0x277bf360

cache1 PC: 0xbfc00020 NPC: 0xbfc00024 Ins: 0x3c1b1001

cache1 PC: 0xbfc00024 NPC: 0xbfc00028 Ins: 0x277bf360

Did I do something wrong?

Thank you Alexandre

Simulation fails after a few hundreds of cycles on the following error:

Assertion failed: (p_vci.reop.read() && "illegal VCI response packet for uncached instruction"), function transition, file /Users/xguerin/Workspace/Simulation/SoCLib.svn/soclib/module/internal_component/vci_xcache_wrapper/caba/source/src/vci_xcache_wrapper.cpp, line 840.

The platform contains:

• 1 VciRam
  
• 1 VciFramebuffer
  
• 1 VciFdAccess
  
• 1 VciMultiTty
  
• 1 VciMultiTimer
  
• 1 Mailbox
  
• 1 to N VciXcache, Mips32 processors (w - w/o GdbServer)
  
  

Works fine on a smaller platform (1 proc. + TTY + FB)