| 1 | [wiki:Component SocLib Components General Index] |
| 2 | |
| 3 | = Mailbox = |
| 4 | |
| 5 | == 1) Functional Description == |
| 6 | |
| 7 | This component is a generic mailbox: it can contain up to 256 independent, software mailbox. |
| 8 | This mailbox allows several processors to communicate via an interrupt mechanism. |
| 9 | |
| 10 | There are two sets of registers per mailbox: one to send messages from a processor P1 to a processor P2 and one to issue an interrupt to a processor P2. Each set of mailbox registers consists of three 16-bit registers and a 1-bit flag register. The interrupting processor can use two 16-bit registers to pass data words to the interrupted processor and the other 16-bit register to pass a command word. Writing a command word in the mailbox generates an interrupt signal to the component which address has been specified. The mailboxes are located in the shared memory space. |
| 11 | Each mailbox takes 12 bytes in the address space, and is seen as 3 memory mapped registers: |
| 12 | |
| 13 | * COMMAND[i] @ BASE + 0[[BR]] |
| 14 | A write request sets a command in the COMMAND[i] register and generates an interrupt on the corresponding index. A read request returns the value on the COMMAND[i] register. |
| 15 | * DATA_W[i] @ BASE + 4[[BR]] |
| 16 | A write request set the data in the DATA_W[i] register.[[BR]] |
| 17 | A read request returns the value of the DATA_W[i] register. |
| 18 | * none @ BASE + 8[[BR]] |
| 19 | Free space for others data... |
| 20 | * RESET_ADR[i] @ BASE + 12[[BR]] |
| 21 | Any write request resets the RESET_ADR[i] register to false.[[BR]] |
| 22 | A read request returns the 0 value if RESET_ADR[i] is false. |
| 23 | |
| 24 | |
| 25 | == 2) Component definition & usage == |
| 26 | |
| 27 | === Component definition === |
| 28 | |
| 29 | * source:trunk/soclib/soclib/module/internal_component/mailbox/caba/metadata/mailbox.sd |
| 30 | |
| 31 | === Usage === |
| 32 | |
| 33 | Mailbox has a Nirq parameter, which defines the number of processors that can be interrupted through the mailbox number. |
| 34 | For example with two processors: |
| 35 | Uses('mailbox', Nirq = 2); |
| 36 | |
| 37 | == 3) CABA Implementation == |
| 38 | |
| 39 | === CABA sources === |
| 40 | |
| 41 | * Interface : source:trunk/soclib/soclib/module/internal_component/mailbox/caba/source/include/mailbox.h |
| 42 | * Implementation : source:trunk/soclib/soclib/module/internal_component/mailbox/caba/source/src/mailbox.cpp |
| 43 | |
| 44 | === CABA Constructor parameters === |
| 45 | |
| 46 | {{{ |
| 47 | mailbox( |
| 48 | sc_module_name insname, // instance name |
| 49 | const soclib::common::IntTab &index, // VCI target index |
| 50 | const soclib::common::MappingTable &mt // segment table |
| 51 | ); |
| 52 | }}} |
| 53 | |
| 54 | === CABA Ports === |
| 55 | |
| 56 | * sc_in<bool> '''p_resetn''' : hardware reset |
| 57 | * sc_in<bool> '''p_clk''' : clock |
| 58 | * soclib::caba::VciTarget<vci_param> '''p_vci''' : The VCI port |
| 59 | * sc_out<bool> '''p_irq [Nirq]''' : Interrupts ports array |
| 60 | |
| 61 | == 4) TLM-T Implementation == |
| 62 | |
| 63 | The TLM-T implementation is not yet available. |