Changes between Version 2 and Version 3 of Component/Mips32


Ignore:
Timestamp:
Sep 8, 2008, 1:53:22 PM (16 years ago)
Author:
Nicolas Pouillon
Comment:

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  • Component/Mips32

    v2 v3  
    33= Processor Functional Description =
    44
    5 This component is an ISS (Instruction Set Simulator), which can be wrapped in a CABA or TLM-T [wiki:Component/VciXcacheWrapper Wrapper].
     5This hardware component is a Mips-32 processor core.
     6
     7This ISS uses the [wiki:Component/Iss2Api ISS2 API]
     8and can be wrapped in a CABA or TLM-T [wiki:Component/VciXcacheWrapper Wrapper].
    69
    710It implements all instructions defined in the MIPS32 architecture specification, with the following limitations: