Changes between Initial Version and Version 1 of Component/ST231

Timestamp:

Feb 25, 2010, 10:30:05 AM (14 years ago)

Author:

sylvain.girbal@…

Comment:

--

Component/ST231

@@ +1 @@
+[wiki:Component SocLib Components General Index] 
+
+!!!! UNDER CONSTRUCTION !!!!
+
+= ST231 Processor Functional Description =
+
+This hardware component is a MicroBlaze processor core as described in [www.xilinx.com/ise/embedded/mb_ref_guide.pdf the Xilinx documentation].
+Note that the 9.2 version of ISE contains a pretty major evolution of the MicroBlaze that integrates a MMU, but this is not the version available within SoCLib (at least yet!).
+This component is an ISS, which should be wrapped with an [wiki:Component/IssWrapper IssWrapper] for integration into a complete platform.
+
+This instruction set simulator acts as a slave to the IssWrapper and is organised identically to the
+other Isses available within the library.
+Currently, the execution timings are pretty rough, and are typically one cycle per instruction.
+
+The support for symetric and asymetric multiprocessing is hardwired using the `fsl` feature of the MicroBlaze.
+The processor number is given at instanciation time, and accessible through `get` on `fsl0`.
+Using other `fsl`s will lead to an abort.
+
+= Component definition =
+
+Available in source:trunk/soclib/soclib/lib/metadata/microblaze.sd
+
+== Usage ==
+
+MicroBlaze has no parameters.
+{{{
+Uses( 'microblaze')
+}}}
+
+= Microblaze Processor ISS  Implementation =
+
+The implementation is in 
+ * source:trunk/soclib/soclib/lib/src/iss/microblaze.h
+   This defines the resources associated to the MicroBlaze along with a few
+   minimal helper functions (or methods, as they call them)
+ * source:trunk/soclib/soclib/lib/src/iss/microblaze.cpp
+   This is a large switch (as opposed to calling insn execution through
+   pointers to functions) and a few macros, as it is overall not worse to
+   traverse a switch than to move from tag to tag, seen the context necessary
+   to the execution of one instruction (at least in the MicroBlaze case).
+
+It is possible to compile a version of the MicroBlaze that issues the instruction
+address along with the instruction being executed by defining `MBDEBUG` at `1` line
+35 of source:trunk/soclib/soclib/lib/src/iss/microblaze.cpp
+This is quite useful to check that the processor is really interpreting correctly a
+sequence of instructions.
+The MicroBlaze model is now able to connect to the GDB stub, so it is possible to
+use GDB for debugging software running on it.
+
+== Template parameters ==
+ 
+This component has no template parameters.
+
+== Constructor parameters ==
+
+{{{
+MicroblazeIss( 
+     sc_module_name name,   //  Instance Name
+     int  ident);   // processor id
+}}}
+
+== Visible registers ==
+
+I'm not sure to understand what this means, ...
+
+== Interrupts ==
+
+There is a single interrupt line on the MicroBlaze, so all the handling is
+software based.
+
+== Ports ==
+
+None, They are provided by the `IssWrapper`.