| 1 | [wiki:Component SocLib Components General Index] |
| 2 | |
| 3 | = Processor Functional Description = |
| 4 | |
| 5 | This hardware component is a Sparc v8 processor core. |
| 6 | |
| 7 | This ISS uses the [wiki:Component/Iss2Api ISS2 API] |
| 8 | and can be wrapped in a CABA or TLM-T [wiki:Component/VciXcacheWrapper Wrapper]. |
| 9 | |
| 10 | It implements all instructions defined in the Sparc v8 architecture specification, with the following limitations: |
| 11 | * LDSTUB, SWAP and alternate versions work only on a word granularity (see below) |
| 12 | * the ASI is currently not supported |
| 13 | * an optional FP is provided through a compilation flag (FPU, enabled by default) |
| 14 | |
| 15 | = Component definition & implementation = |
| 16 | |
| 17 | * source:trunk/soclib/soclib/lib/sparcv8/metadata/sparcv8.sd |
| 18 | * source:trunk/soclib/soclib/lib/sparcv8/include/sparcv8.h |
| 19 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8.cpp |
| 20 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_run.cpp |
| 21 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_logical.cpp |
| 22 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_branch.cpp |
| 23 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_load_store.cpp |
| 24 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_traps.cpp |
| 25 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_hazard.cpp |
| 26 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_debug.cpp |
| 27 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_fp.cpp |
| 28 | * source:trunk/soclib/soclib/lib/sparcv8/src/sparcv8_cp.cpp |
| 29 | |
| 30 | |
| 31 | == Template parameters == |
| 32 | |
| 33 | This component has one template parameter : |
| 34 | * NWIN (int) : the number of windows. By default : 8 |
| 35 | |
| 36 | == Interrupts == |
| 37 | |
| 38 | Sparc V8 defines 4 interrupts lines. |
| 39 | |
| 40 | == Ports == |
| 41 | |
| 42 | None, it is to the wrapper to provide them. |
| 43 | |
| 44 | == LDSTUB and SWAP support == |
| 45 | |
| 46 | SocLib infrastructure doesn't support directly SWAP and LDSTUB instructions. Thus they are emulated through SC and LL extended accesses. |
| 47 | When executed, the infrastructure verify that they succeeded. If not, they may either trap or be automatically re-executed until successfull execution. |
| 48 | The compilation flag SWAP_TRAPS decides which strategy to use. |
| 49 | _Warning_ : when automatic re-execution is choosen, the system may deadlock. |