Changes between Initial Version and Version 1 of Component/Vci Multi Icu


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Timestamp:
Dec 12, 2013, 10:21:55 AM (10 years ago)
Author:
alain
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  • Component/Vci Multi Icu

    v1 v1  
     1[wiki:Component SocLib Components General Index]
     2
     3= !VciMultiIcu =
     4
     5== 1) Functional Description ==
     6
     7This VCI target is a multi-channels memory mapped peripheral implementing
     8a vectorized interrupt controller. It can concentrate up
     9to 32 input interrupts '''p_irq_in[i]''' to 8 output
     10interrupts '''p_irq_out[k]'''.
     11
     12It behaves as 8 independant '''VciIcu''' components, and can be used in a multi-processors
     13architecture to dispatch the peripheral interrupts to the various processors, using
     14the software programmable registers ICU_MASK[k].
     15
     16There is one independant set of registers for each channel [k] (i.e. for each output interrupt) and each input interrupt can be individually masked through the programmable register ICU_MASK[k].
     17
     18The priority scheme is fixed : The lower indexes have the highest priority.
     19
     20For each channel [k], the ICU_IT_VECTOR[k] register can be addressed to return the index of the highest priority, non masked, active interrupt '''p_irq_[i]'''.
     21
     22This hardware component checks for segmentation violation, and can be used
     23as a default target.
     24
     25For each channel [k] there is five addressable registers:
     26
     27 * `ICU_INT[k]`
     28   Each bit in this register reflects the state of the corresponding input interrupt line.
     29   This is read-only.
     30
     31 * `ICU_MASK[k]`
     32   Each bit in this register reflects the state of the enable for the corresponding interrupt line.
     33   This is read-only.
     34
     35 * `ICU_MASK_SET[k]`
     36   Each bit set in the written word will be set in the ICU MASK. (ICU_MASK = ICU_MASK | written_data).
     37   This is write-only.
     38
     39 * `ICU_MASK_CLEAR[k]`
     40   Each bit set in the written word will be reset in the ICU MASK. (ICU_MASK = ICU_MASK & ~written_data).
     41   This is write-only.
     42
     43 * `ICU_IT_VECTOR[k]`
     44   This register gives the index of the highest-priority active interrupt.
     45   If no interrupt is active, (-1) is returned.
     46   This is read-only.
     47
     48For extensibility issues, you should access your ICU using globally-defined offsets.
     49
     50You should include file `soclib/icu.h` from your software, it
     51defines `ICU_INT`, `ICU_MASK`, `ICU_MASK_SET`, `ICU_MASK_CLEAR`, `ICU_IT_VECTOR`.
     52
     53
     54== 2) Component definition & usage ==
     55
     56source:trunk/soclib/module/infrastructure_component/interrupt_infrastructure/vci_multi_icu/caba/metadata/vci_multi_icu.sd
     57
     58{{{
     59Uses( 'vci_icu')
     60}}}
     61
     62== 3) CABA  Implementation ==
     63
     64=== CABA sources ===
     65
     66 * interface : source:trunk/soclib/soclib/module/infrastructure_component/interrupt_infrastructure/vci_multi_icu/caba/source/include/vci_multi_icu.h
     67 * implementation : source:trunk/soclib/soclib/module/infrastructure_component/interrupt_infrastructure/vci_multi_icu/caba/source/src/vci_multi_icu.cpp
     68
     69=== CABA Constructor parameters ===
     70{{{
     71VciIcu(
     72     sc_module_name name,  // Component Name
     73     const soclib::common::InTab &index, // Target index
     74     const soclib::common::MappingTable &mt,  // Mapping Table
     75     size_t nirq_in,  // Number of input interrupts
     76     size_t nirq_out);  // Number of channels (output interrupts)
     77}}}
     78
     79=== CABA Ports ===
     80 * '''p_resetn'''  : Global system reset
     81 * '''p_clk''' : Global system clock
     82 * '''p_vci''' : VCI target port
     83 * '''p_irq_in[i]''' : Up to 32 input IRQ ports
     84 * '''p_irq_out[k]''' : Up to 8 output IRQ ports
     85