Changes between Version 9 and Version 10 of Component/Vci Xicu

Timestamp:

Oct 31, 2010, 9:09:53 PM (15 years ago)

Author:

alain

Comment:

--

Component/Vci Xicu

@@ -61 +61 @@
 
 '''WTI_REG[WTI_INDEX] : Write-Triggered Interrupt Register'''
+
 This register retains the value written. It can be used as a mailbox between the interrupt source and the target if here is only one source. In case of several sources, two different sources may write sequentially to this register, overwriting the value present in register.
  * On write : Raises WTI[WTI_INDEX] 
  * On read : Acknowledges WTI[WTI_INDEX] 
 
-'''PTI_PER[PTI_INDEX] : Timer Period Register'''
+'''PTI_PER[PTI_INDEX] : Programmable Timer Period Register'''
+
 This register contains the reset value for TIMER[PTI_INDEX] when it wraps to 0. If this register is set to 0, the corresponding timer is disabled and no interrupt is ever raised. Setting this register to 0 when there is a pending interrupt clears it without need to read PTI_ACK[PTI_INDEX]. 
  * On write : Resets the period of TIMER[PTI_INDEX]. If the timer is currently running, the corresponding timer counter is not reset. 
  * On read : Gets the period of TIMER[PTI_INDEX]. 
 
+'''PTI_VAL[PTI_INDEX] : Programmable Timer Value Register'''
+
+This register is decremented by 1 on each clock's raising edge. When it gets to 0, the value is reset to the corresponding period register value (PTI_PER[PTI–INDEX]), and the corresponding timer interrupt line is asserted until acknowledged. Decrementation goes on whether interrupt is acknowledged or not. 
+ * On write : Resets the current value of TIMER[PTI_INDEX]. 
+Writing a value greater than PTI_PER[PTI_INDEX] in this register has no particular side-effect: value will normally decrement to 0 and then be reset to PTI_PER[PTI_INDEX] when wrapping. 
+ * On read : Gets the current value of TIMER[PTI_INDEX]. 
+
+'''PTI_ACK[PTI_INDEX] : Programmable Timer Acknowledge Register'''
+
+This register is used by the software to deassert an interrupt raised by wrapping of the PTI_VAL[PTI_INDEX] register. 
+ * On write : Unsupported 
+ * On read : Acknowledges the interrupt associated to TIMER[PTI_INDEX]. Read value has no useful meaning. 
+
+'''MSK_PTI[OUT_INDEX] : Programmable Timet Mask for IRQ[OUT_INDEX]'''
+
+Each bit in this register is a mask for the corresponding TI%ER IRQ. A 1 in bit x enables the Timer as an interrupt source for IRQ[OUT_INDEX]. 
+ * On write : Sets the current mask 
+ * On read : Gets the current mask 
 
 Complete specification is in [attachment:xicu-1.0.pdf].