wiki:Component

Version 75 (modified by ivan.miro-panades@…, 14 years ago) (diff)

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SoCLib components documentation

VCI Targets

  • VciRam : A multi-segment embedded Ram controller
  • VciMultiTty : A memory mapped multi-TTY controller
  • VciMultiTimer : A memory mapped multi-Timer controller
  • VciIcu : A memory mapped interrupt controller
  • VciLocks : A memory mapped locks controller
  • VciPCI : A bridge to the PCI bus
  • VciLogConsole : A memory-mapped text log sink

VCI Initiators

  • VciXcacheWrapper : A generic, VCI compliant, cache controller for 32 bits RISC processors
  • VciCcXcacheWrapper : A generic, VCI compliant, cache controller for 32 bits RISC processors with directory-based cache coherence support
  • VciVcacheWrapper : A generic, VCI compliant, cache controller for 32 bits RISC processors supporting virtual memory
  • VciXcache : An old cache controller for 32 bits RISC processors (deprecated)
  • VciDma : A DMA engine
  • VciFdAccess : A file system access controller
  • VciBlockDevice : A block device controller
  • VciMwmrController : A Mwmr channels controller
  • VciMwmrControllerLf : Another Mwmr channels controller

VCI Interconnects

Common utilities

Optional utilities

  • ProcessWrapper : A simulator-side fork/exec abstraction tool, with process' stdin/stdout communication
  • FbController : A simulator-side framebuffer abstraction tool
  • Mailbox : A mailbox component allows several processors to communicate via an interrupt mecanism
  • VciTargetFsm : A generic caba class for handling the VCI fsm part of target components, so that you can focus on the functionality

Dedicated coprocessors

Processors (Instruction Set Simulator)