Version 86 (modified by Nicolas Pouillon, 15 years ago) (diff)


Processor ISS (Instruction Set Simulator)


VCI Targets

  • VciRam : A multi-segment embedded Ram controller
  • VciMultiTty : A memory mapped multi-TTY controller
  • VciMultiTimer : A memory mapped multi-Timer controller
  • VciIcu : A memory mapped interrupt controller
  • VciLocks : A memory mapped locks controller
  • VciPCI : A bridge to the PCI bus
  • VciLogConsole : A memory-mapped text log sink
  • Mailbox : A mailbox component allows several processors to communicate via an interrupt mecanism

VCI Initiators

Iss Wrappers (caches)

Other initiators

VCI Interconnects

Common modules

  • MappingTable : A tool to declare and list all memory segments in a platform
  • Loader : A binary-file loader (ELF, COFF, plain)


  • VciTargetFsm : A generic CABA submodule for handling the VCI fsm part of target components, so that you can focus on the functionality
  • TtyWrapper : A simulator-side TTY abstraction tool, used by VciMultiTty
  • ProcessWrapper : A simulator-side fork/exec abstraction tool, with process' stdin/stdout communication
  • FbController : A simulator-side framebuffer abstraction tool

Dedicated coprocessors